[PATCH] x86/apic: use MSR programmming interface to read APIC register in x2APIC mode

[Zhou JianFeng <jianfeng.zhou@intel.com>]

Memory-mapped interface is only supported when operating in xAPIC mode.

When x2APIC mode enabled, the following calling will read APIC register by
memory-mapping interface in x2APIC mode:
    default_setup_apic_routing()
        x2apic_cluster_probe()
            init_x2apic_ldr()
                apic_read(APIC_LDR)
The APIC id read by apic_read(APIC_LDR) is invalid(0xffffffff in my tests),
and will lead to MCE(machine check exception) when RAS(Reliability
Availability Serviceability) enabled.

Read APIC id by using programming interface in x2APIC mode.

Signed-off-by: Zhou JianFeng <jianfeng.zhou@intel.com>
---
 arch/x86/kernel/apic/x2apic_cluster.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index f4da9bb69a88..311a844bb779 100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -100,9 +100,14 @@ static u32 x2apic_calc_apicid(unsigned int cpu)
 static void init_x2apic_ldr(void)
 {
 	struct cluster_mask *cmsk = this_cpu_read(cluster_masks);
-	u32 cluster, apicid = apic_read(APIC_LDR);
+	u32 cluster, apicid;
 	unsigned int cpu;
 
+	if (x2apic_enabled())
+		apicid = native_apic_msr_read(APIC_LDR);
+	else
+		apicid = apic_read(APIC_LDR);
+
 	this_cpu_write(x86_cpu_to_logical_apicid, apicid);
 
 	if (cmsk)
-- 
2.27.0