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Wed, 18 Aug 2021 01:43:31 -0700 Envelope-to: git@xilinx.com, laurent.pinchart@ideasonboard.com, kishon@ti.com, vkoul@kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Received: from [10.140.6.35] (port=57526 helo=xhdsaipava40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1mGHAX-0006Sn-Cs; Wed, 18 Aug 2021 01:43:29 -0700 From: Piyush Mehta To: , , , , CC: , , , , Piyush Mehta Subject: [PATCH] phy: xilinx: zynqmp: skip PHY initialization and PLL lock for USB Date: Wed, 18 Aug 2021 14:13:11 +0530 Message-ID: <20210818084311.2643986-1-piyush.mehta@xilinx.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 73be2b6f-6071-424d-8313-08d9622442f2 X-MS-TrafficTypeDiagnostic: DM6PR02MB4873: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2021 08:43:33.0360 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 73be2b6f-6071-424d-8313-08d9622442f2 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT0035.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB4873 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PHY initialization for USB is required on linux boot or when gt lane is changed from the current one and it is applicable on PLL lock too. Signed-off-by: Piyush Mehta --- drivers/phy/xilinx/phy-zynqmp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/phy/xilinx/phy-zynqmp.c b/drivers/phy/xilinx/phy-zynqmp.c index 35652152ce5d..f478d8a17115 100644 --- a/drivers/phy/xilinx/phy-zynqmp.c +++ b/drivers/phy/xilinx/phy-zynqmp.c @@ -626,6 +626,9 @@ static int xpsgtr_phy_power_on(struct phy *phy) struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy); int ret = 0; + /* Skip initialization if not required. */ + if (!xpsgtr_phy_init_required(gtr_phy)) + return ret; /* * Wait for the PLL to lock. For DP, only wait on DP0 to avoid * cumulating waits for both lanes. The user is expected to initialize -- 2.25.1