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Peter Anvin" , Juergen Gross , "Peter Zijlstra (Intel)" , Joerg Roedel Subject: [PATCH V3 35/49] x86/entry: Implement the C version ist_paranoid_entry() Date: Thu, 14 Oct 2021 11:41:07 +0800 Message-Id: <20211014034121.17025-4-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20211014031413.14471-1-jiangshanlai@gmail.com> References: <20211014031413.14471-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Lai Jiangshan It implements the whole ASM version paranoid_entry(). No functional difference intended. Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry64.c | 37 +++++++++++++++++++++++++++++++++ arch/x86/include/asm/idtentry.h | 3 +++ 2 files changed, 40 insertions(+) diff --git a/arch/x86/entry/entry64.c b/arch/x86/entry/entry64.c index 06f7476d78b4..8e1474ece7f9 100644 --- a/arch/x86/entry/entry64.c +++ b/arch/x86/entry/entry64.c @@ -288,3 +288,40 @@ static __always_inline unsigned long ist_switch_to_kernel_gsbase(void) /* SWAPGS required on exit */ return 0; } + +/* + * Switch and save CR3 in *@cr3 if PTI enabled. Return GSBASE related + * information in *@gsbase depending on the availability of the FSGSBASE + * instructions: + * + * FSGSBASE *@gsbase + * N 0 -> SWAPGS on exit + * 1 -> no SWAPGS on exit + * + * Y GSBASE value at entry, must be restored in ist_paranoid_exit + */ +__visible __entry_text +void ist_paranoid_entry(unsigned long *cr3, unsigned long *gsbase) +{ + /* + * Always stash CR3 in *@cr3. This value will be restored, + * verbatim, at exit. Needed if ist_paranoid_entry interrupted + * another entry that already switched to the user CR3 value + * but has not yet returned to userspace. + * + * This is also why CS (stashed in the "iret frame" by the + * hardware at entry) can not be used: this may be a return + * to kernel code, but with a user CR3 value. + * + * Switching CR3 does not depend on kernel GSBASE so it can + * be done before switching to the kernel GSBASE. This is + * required for FSGSBASE because the kernel GSBASE has to + * be retrieved from a kernel internal table. + */ + *cr3 = ist_switch_to_kernel_cr3(); + + barrier(); + + /* Handle GSBASE, store the return value in *@gsbase for exit. */ + *gsbase = ist_switch_to_kernel_gsbase(); +} diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h index 49fabc3e3f0d..f6efa21ec242 100644 --- a/arch/x86/include/asm/idtentry.h +++ b/arch/x86/include/asm/idtentry.h @@ -307,6 +307,9 @@ static __always_inline void __##func(struct pt_regs *regs) DECLARE_IDTENTRY(vector, func) #ifdef CONFIG_X86_64 +__visible __entry_text +void ist_paranoid_entry(unsigned long *cr3, unsigned long *gsbase); + /** * DECLARE_IDTENTRY_IST - Declare functions for IST handling IDT entry points * @vector: Vector number (ignored for C) -- 2.19.1.6.gb485710b