From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8972DC433FE for ; Thu, 21 Oct 2021 03:58:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 63EE96113D for ; Thu, 21 Oct 2021 03:58:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229700AbhJUEBK (ORCPT ); Thu, 21 Oct 2021 00:01:10 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:36024 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229450AbhJUEBJ (ORCPT ); Thu, 21 Oct 2021 00:01:09 -0400 X-UUID: bac1888e3b3d40c59257dc7eb9aad423-20211021 X-UUID: bac1888e3b3d40c59257dc7eb9aad423-20211021 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1747227135; Thu, 21 Oct 2021 11:58:46 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 21 Oct 2021 11:58:45 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 21 Oct 2021 11:58:45 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 21 Oct 2021 11:58:45 +0800 From: YC Hung To: , , , CC: , , , , , , , , Subject: [PATCH v2 0/2] Add code to manage DSP clocks and provide dts-binding document Date: Thu, 21 Oct 2021 11:58:39 +0800 Message-ID: <20211021035841.2365-1-yc.hung@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "yc.hung" This code is based on top of SOF topic/sof-dev branch and we want to have a review with ALSA and device Tree communities the it will be merged to SOF tree and then merged into ALSA tree. It provides two patches, one is for mt8195 dsp clocks related. Another is for mt8195 dsp dts binding decription. YC Hung (2): ASoC: SOF: mediatek: Add mt8195 dsp clock support dt-bindings: dsp: mediatek: Add mt8195 DSP binding support .../bindings/dsp/mtk,mt8195-dsp.yaml | 139 +++++++++++++++ sound/soc/sof/mediatek/mt8195/Makefile | 2 +- sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 164 ++++++++++++++++++ sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 29 ++++ sound/soc/sof/mediatek/mt8195/mt8195.c | 23 ++- 5 files changed, 354 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h -- 2.18.0