From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49F01C433F5 for ; Tue, 2 Nov 2021 05:59:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1F8036056B for ; Tue, 2 Nov 2021 05:59:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229616AbhKBGBh (ORCPT ); Tue, 2 Nov 2021 02:01:37 -0400 Received: from verein.lst.de ([213.95.11.211]:54483 "EHLO verein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229486AbhKBGBg (ORCPT ); Tue, 2 Nov 2021 02:01:36 -0400 Received: by verein.lst.de (Postfix, from userid 2407) id 270BB68AA6; Tue, 2 Nov 2021 06:58:58 +0100 (CET) Date: Tue, 2 Nov 2021 06:58:57 +0100 From: Christoph Hellwig To: Guo Ren Cc: Palmer Dabbelt , Wei Fu , Anup Patel , Atish Patra , Christoph =?iso-8859-1?Q?M=FCllner?= , Philipp Tomsich , Christoph Hellwig , liush , Wei Wu =?utf-8?B?KOWQtOS8nyk=?= , Drew Fustini , linux-riscv , Linux Kernel Mailing List , taiten.peng@canonical.com, Aniket Ponkshe , Heinrich Schuchardt , Gordan Markus , Guo Ren , Arnd Bergmann , Chen-Yu Tsai , Maxime Ripard , Daniel Lustig , Greg Favor , Andrea Mondelli , Jonathan Behrens , "Xinhaoqu (Freddie)" , Bill Huffman , Nick Kossifidis , Allen Baum , Josh Scheid , Richard Trauben Subject: Re: [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard Extension supports Message-ID: <20211102055857.GB26925@lst.de> References: <20211025040607.92786-1-wefu@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.17 (2007-11-01) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 02, 2021 at 10:07:58AM +0800, Guo Ren wrote: > > To separate MMU & no-MMU clearly, I suggest fuwei add > #if defined(CONFIG_64BIT) && defined(CONFIG_MMU) Actually - for documentation purposes a new CONFIG_RISCV_SVPBMT that depends on 64BIT && MMU would probably much better as it clearly documents the intent here.