[atishp04:ox_v5.14_working 7/13] drivers/pci/controller/pci-xgene.c:53: warning: "SZ_1T" redefined

[kernel test robot <lkp@intel.com>]

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tree:   https://github.com/atishp04/linux ox_v5.14_working
head:   9d2e326476c44eade0d6b7ee54c4eb8918d6aa94
commit: 1c2856d72ab636dbba2b2609dad87fdfaed0ff90 [7/13] riscv: Improve virtual kernel memory layout dump
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/atishp04/linux/commit/1c2856d72ab636dbba2b2609dad87fdfaed0ff90
        git remote add atishp04 https://github.com/atishp04/linux
        git fetch --no-tags atishp04 ox_v5.14_working
        git checkout 1c2856d72ab636dbba2b2609dad87fdfaed0ff90
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/pci/controller/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/pci/controller/pci-xgene.c:53: warning: "SZ_1T" redefined
      53 | #define SZ_1T                           (SZ_1G*1024ULL)
         | 
   In file included from arch/arm64/include/asm/memory.h:14,
                    from arch/arm64/include/asm/thread_info.h:17,
                    from include/linux/thread_info.h:60,
                    from arch/arm64/include/asm/preempt.h:5,
                    from include/linux/preempt.h:78,
                    from include/linux/smp.h:110,
                    from include/linux/lockdep.h:14,
                    from include/linux/mutex.h:17,
                    from include/linux/notifier.h:14,
                    from include/linux/clk.h:14,
                    from drivers/pci/controller/pci-xgene.c:9:
   include/linux/sizes.h:50: note: this is the location of the previous definition
      50 | #define SZ_1T                           _AC(0x10000000000, ULL)
         | 


vim +/SZ_1T +53 drivers/pci/controller/pci-xgene.c

5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  45  
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  46  #define LINK_UP_MASK			0x00000100
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  47  #define AXI_EP_CFG_ACCESS		0x10000
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  48  #define EN_COHERENCY			0xF0000000
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  49  #define EN_REG				0x00000001
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  50  #define OB_LO_IO			0x00000002
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  51  #define XGENE_PCIE_VENDORID		0x10E8
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  52  #define XGENE_PCIE_DEVICEID		0xE004
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01 @53  #define SZ_1T				(SZ_1G*1024ULL)
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  54  #define PIPE_PHY_RATE_RD(src)		((0xc000 & (u32)(src)) >> 0xe)
5f6b6ccdbe1cdf drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  55  

:::::: The code at line 53 was first introduced by commit
:::::: 5f6b6ccdbe1cdfa5aa4347ec5412509b8995db27 PCI: xgene: Add APM X-Gene PCIe driver

:::::: TO: Tanmay Inamdar <tinamdar@apm.com>
:::::: CC: Bjorn Helgaas <bhelgaas@google.com>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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