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From: Jaewon Kim <jaewon02.kim@samsung.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Wolfram Sang <wsa@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	chanho61.park@samsung.com, linux-arm-kernel@lists.infradead.org,
	Sam Protsenko <semen.protsenko@linaro.org>,
	Jaewon Kim <jaewon02.kim@samsung.com>
Subject: [PATCH v3 1/2] dt-bindings: i2c: exynos5: add exynosautov9-hsi2c compatible
Date: Fri, 12 Nov 2021 10:01:36 +0900	[thread overview]
Message-ID: <20211112010137.149174-2-jaewon02.kim@samsung.com> (raw)
In-Reply-To: <20211112010137.149174-1-jaewon02.kim@samsung.com>

This patch adds new "samsung,exynosautov9-hsi2c" compatible.
It is for i2c compatible with HSI2C available on Exynos SoC with USI.

Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
index 2dbc0b62daa6..39f4067d9d1f 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
@@ -14,6 +14,8 @@ Required properties:
 				on Exynos5260 SoCs.
 	-> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
 				on Exynos7 SoCs.
+	-> "samsung,exynosautov9-hsi2c", for i2c compatible with HSI2C available
+				on ExynosAutov9 SoCs.
 
   - reg: physical base address of the controller and length of memory mapped
     region.
@@ -31,6 +33,11 @@ Optional properties:
        at 100khz.
     -> If specified, the bus operates in high-speed mode only if the
        clock-frequency is >= 1Mhz.
+  - samsung,sysreg : system registers controller phandle to control USI.
+    -> If I2C integrated to USI(Universal Serial Interface), this property
+       is required. When using Exynos USI block, it needs to select which type
+       of Serial IPs(UART, SPI, I2C) to use with system register. So, it
+       requires samsung,sysreg phandle and offset value of system register.
 
 Example:
 
-- 
2.33.1


  parent reply	other threads:[~2021-11-12  1:06 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20211112010603epcas2p331fe717eabfd9fc0280792921b25c535@epcas2p3.samsung.com>
2021-11-12  1:01 ` [PATCH v3 0/2] i2c: exynos5: add support for ExynosAutov9 SoC Jaewon Kim
     [not found]   ` <CGME20211112010603epcas2p26c076e65e0cb286cb53f06053165ef60@epcas2p2.samsung.com>
2021-11-12  1:01     ` Jaewon Kim [this message]
2021-11-15 18:56       ` [PATCH v3 1/2] dt-bindings: i2c: exynos5: add exynosautov9-hsi2c compatible Sam Protsenko
2021-11-19  8:57       ` Krzysztof Kozlowski
     [not found]   ` <CGME20211112010603epcas2p339d1a6ef3df7cdbe61c87c8afa541fd0@epcas2p3.samsung.com>
2021-11-12  1:01     ` [PATCH v3 2/2] i2c: exynos5: add support for ExynosAutov9 SoC Jaewon Kim
2021-11-12  8:09       ` Krzysztof Kozlowski
2021-11-15 18:55       ` Sam Protsenko
2021-11-16  1:12         ` Chanho Park
2021-11-16  9:31           ` Krzysztof Kozlowski
2021-11-16 15:31             ` Sam Protsenko
2021-11-19  8:51               ` Krzysztof Kozlowski
2021-11-18 19:59             ` Sam Protsenko
2021-11-19  8:54               ` Krzysztof Kozlowski
2021-11-19 14:12                 ` Sam Protsenko
2021-11-22  2:51                   ` Jaewon Kim
2021-11-17 22:17           ` David Virag

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