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From: Rikard Falkeborn <rikard.falkeborn@gmail.com>
To: Zhenyu Wang <zhenyuw@linux.intel.com>,
	Zhi Wang <zhi.a.wang@intel.com>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gvt-dev@lists.freedesktop.org,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	linux-kernel@vger.kernel.org,
	Rikard Falkeborn <rikard.falkeborn@gmail.com>
Subject: [PATCH 7/9] drm/i915/gvt: Constify formats
Date: Sat,  4 Dec 2021 11:55:25 +0100	[thread overview]
Message-ID: <20211204105527.15741-8-rikard.falkeborn@gmail.com> (raw)
In-Reply-To: <20211204105527.15741-1-rikard.falkeborn@gmail.com>

These are never modified, so make them const to allow the compiler to
put them in read-only memory. WHile at it, make the description const
char* since it is never modified.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
---
 drivers/gpu/drm/i915/gvt/fb_decoder.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index 11a8baba6822..3c8736ae8fed 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -40,12 +40,12 @@
 
 #define PRIMARY_FORMAT_NUM	16
 struct pixel_format {
-	int	drm_format;	/* Pixel format in DRM definition */
-	int	bpp;		/* Bits per pixel, 0 indicates invalid */
-	char	*desc;		/* The description */
+	int		drm_format;	/* Pixel format in DRM definition */
+	int		bpp;		/* Bits per pixel, 0 indicates invalid */
+	const char	*desc;		/* The description */
 };
 
-static struct pixel_format bdw_pixel_formats[] = {
+static const struct pixel_format bdw_pixel_formats[] = {
 	{DRM_FORMAT_C8, 8, "8-bit Indexed"},
 	{DRM_FORMAT_RGB565, 16, "16-bit BGRX (5:6:5 MSB-R:G:B)"},
 	{DRM_FORMAT_XRGB8888, 32, "32-bit BGRX (8:8:8:8 MSB-X:R:G:B)"},
@@ -58,7 +58,7 @@ static struct pixel_format bdw_pixel_formats[] = {
 	{0, 0, NULL},
 };
 
-static struct pixel_format skl_pixel_formats[] = {
+static const struct pixel_format skl_pixel_formats[] = {
 	{DRM_FORMAT_YUYV, 16, "16-bit packed YUYV (8:8:8:8 MSB-V:Y2:U:Y1)"},
 	{DRM_FORMAT_UYVY, 16, "16-bit packed UYVY (8:8:8:8 MSB-Y2:V:Y1:U)"},
 	{DRM_FORMAT_YVYU, 16, "16-bit packed YVYU (8:8:8:8 MSB-U:Y2:V:Y1)"},
@@ -278,14 +278,14 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu,
 
 #define CURSOR_FORMAT_NUM	(1 << 6)
 struct cursor_mode_format {
-	int	drm_format;	/* Pixel format in DRM definition */
-	u8	bpp;		/* Bits per pixel; 0 indicates invalid */
-	u32	width;		/* In pixel */
-	u32	height;		/* In lines */
-	char	*desc;		/* The description */
+	int		drm_format;	/* Pixel format in DRM definition */
+	u8		bpp;		/* Bits per pixel; 0 indicates invalid */
+	u32		width;		/* In pixel */
+	u32		height;		/* In lines */
+	const char	*desc;		/* The description */
 };
 
-static struct cursor_mode_format cursor_pixel_formats[] = {
+static const struct cursor_mode_format cursor_pixel_formats[] = {
 	{DRM_FORMAT_ARGB8888, 32, 128, 128, "128x128 32bpp ARGB"},
 	{DRM_FORMAT_ARGB8888, 32, 256, 256, "256x256 32bpp ARGB"},
 	{DRM_FORMAT_ARGB8888, 32, 64, 64, "64x64 32bpp ARGB"},
@@ -391,7 +391,7 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
 
 #define SPRITE_FORMAT_NUM	(1 << 3)
 
-static struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = {
+static const struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = {
 	[0x0] = {DRM_FORMAT_YUV422, 16, "YUV 16-bit 4:2:2 packed"},
 	[0x1] = {DRM_FORMAT_XRGB2101010, 32, "RGB 32-bit 2:10:10:10"},
 	[0x2] = {DRM_FORMAT_XRGB8888, 32, "RGB 32-bit 8:8:8:8"},
-- 
2.34.1


  parent reply	other threads:[~2021-12-04 10:56 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-04 10:55 [PATCH 0/9] drm/i915/gvt: Constify static structs Rikard Falkeborn
2021-12-04 10:55 ` [PATCH 1/9] drm/i915/gvt: Constify intel_gvt_gtt_pte_ops Rikard Falkeborn
2021-12-10  8:59   ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 2/9] " Rikard Falkeborn
2021-12-10  8:11   ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 3/9] drm/i915/gvt: Constify intel_gvt_irq_ops Rikard Falkeborn
2021-12-10  8:11   ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 4/9] drm/i915/gvt: Constify intel_gvt_sched_policy_ops Rikard Falkeborn
2021-12-10  8:11   ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 5/9] drm/i915/gvt: Constify gvt_mmio_block Rikard Falkeborn
2021-12-10  8:12   ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 6/9] drm/i915/gvt: Constify cmd_interrupt_events Rikard Falkeborn
2021-12-10  8:12   ` Wang, Zhi A
2021-12-04 10:55 ` Rikard Falkeborn [this message]
2021-12-10  8:20   ` [PATCH 7/9] drm/i915/gvt: Constify formats Wang, Zhi A
2021-12-12 13:21     ` Rikard Falkeborn
2021-12-04 10:55 ` [PATCH 8/9] drm/i915/gvt: Constify gtt_type_table_entry Rikard Falkeborn
2021-12-10  8:20   ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 9/9] drm/i915/gvt: Constify vgpu_types Rikard Falkeborn
2021-12-10  8:20   ` Wang, Zhi A
2021-12-10  9:00 ` [PATCH 0/9] drm/i915/gvt: Constify static structs Wang, Zhi A
2021-12-12 13:25   ` Rikard Falkeborn
2021-12-16 19:21     ` Wang, Zhi A

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