From: Tinghan Shen <tinghan.shen@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Sean Wang <sean.wang@mediatek.com>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-gpio@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
<ryder.lee@kernel.org>, <wenst@chromium.org>,
<chunfeng.yun@mediatek.com>,
Tinghan Shen <tinghan.shen@mediatek.com>
Subject: [PATCH v8 3/4] dt-bindings: pinctrl: mt8195: Add mediatek,drive-strength-adv property
Date: Fri, 7 Jan 2022 19:53:44 +0800 [thread overview]
Message-ID: <20220107115345.9075-4-tinghan.shen@mediatek.com> (raw)
In-Reply-To: <20220107115345.9075-1-tinghan.shen@mediatek.com>
Extend pin driving support for I2C pins on SoC mt8195.
This property is also documented in mediatek,mt8183-pinctrl.yaml.
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
---
.../bindings/pinctrl/pinctrl-mt8195.yaml | 35 +++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
index 567f71cab7b4..5e27e01d6588 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
@@ -98,6 +98,32 @@ patternProperties:
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
+ mediatek,drive-strength-adv:
+ description: |
+ Describe the specific driving setup property.
+ For I2C pins, the existing generic driving setup can only support
+ 2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they
+ can support 0.125/0.25/0.5/1mA adjustment. If we enable specific
+ driving setup, the existing generic setup will be disabled.
+ The specific driving setup is controlled by E1E0EN.
+ When E1=0/E0=0, the strength is 0.125mA.
+ When E1=0/E0=1, the strength is 0.25mA.
+ When E1=1/E0=0, the strength is 0.5mA.
+ When E1=1/E0=1, the strength is 1mA.
+ EN is used to enable or disable the specific driving setup.
+ Valid arguments are described as below:
+ 0: (E1, E0, EN) = (0, 0, 0)
+ 1: (E1, E0, EN) = (0, 0, 1)
+ 2: (E1, E0, EN) = (0, 1, 0)
+ 3: (E1, E0, EN) = (0, 1, 1)
+ 4: (E1, E0, EN) = (1, 0, 0)
+ 5: (E1, E0, EN) = (1, 0, 1)
+ 6: (E1, E0, EN) = (1, 1, 0)
+ 7: (E1, E0, EN) = (1, 1, 1)
+ So the valid arguments are from 0 to 7.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1, 2, 3, 4, 5, 6, 7]
+
bias-pull-down:
description: |
For pull down type is normal, it don't need add RSEL & R1R0 define
@@ -265,4 +291,13 @@ examples:
bias-pull-down;
};
};
+
+ i2c0-pins {
+ pins {
+ pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
+ <PINMUX_GPIO9__FUNC_SCL0>;
+ bias-disable;
+ mediatek,drive-strength-adv = <7>;
+ };
+ };
};
--
2.18.0
next prev parent reply other threads:[~2022-01-07 11:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-07 11:53 [PATCH v8 0/4] Add basic SoC support for mediatek mt8195 Tinghan Shen
2022-01-07 11:53 ` [PATCH v8 1/4] dt-bindings: arm: mediatek: Add mt8195 pericfg compatible Tinghan Shen
2022-01-07 11:53 ` [PATCH v8 2/4] dt-bindings: arm: cpus: Add cortex-a78 compatible Tinghan Shen
2022-01-07 19:04 ` Rob Herring
2022-01-07 11:53 ` Tinghan Shen [this message]
2022-01-12 1:51 ` [PATCH v8 3/4] dt-bindings: pinctrl: mt8195: Add mediatek,drive-strength-adv property Rob Herring
2022-01-07 11:53 ` [PATCH v8 4/4] arm64: dts: Add mediatek SoC mt8195 and evaluation board Tinghan Shen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220107115345.9075-4-tinghan.shen@mediatek.com \
--to=tinghan.shen@mediatek.com \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=bgolaszewski@baylibre.com \
--cc=chunfeng.yun@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=matthias.bgg@gmail.com \
--cc=robh+dt@kernel.org \
--cc=ryder.lee@kernel.org \
--cc=sean.wang@mediatek.com \
--cc=wenst@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome