From: Claudiu Beznea <claudiu.beznea@microchip.com>
To: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<ludovic.desroches@microchip.com>, <robh+dt@kernel.org>,
<linux@armlinux.org.uk>, <sboyd@kernel.org>,
<mturquette@baylibre.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Claudiu Beznea <claudiu.beznea@microchip.com>
Subject: [PATCH v2 03/10] ARM: at91: ddr: fix typo to align with datasheet naming
Date: Thu, 13 Jan 2022 16:48:53 +0200 [thread overview]
Message-ID: <20220113144900.906370-4-claudiu.beznea@microchip.com> (raw)
In-Reply-To: <20220113144900.906370-1-claudiu.beznea@microchip.com>
Fix typo on UDDRC_PWRCTL.SELFREF_SW bitmask to align with datasheet
naming.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
arch/arm/mach-at91/pm_suspend.S | 4 ++--
include/soc/at91/sama7-ddr.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index fdb4f63ecde4..abe4ced33eda 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -159,7 +159,7 @@ sr_ena_1:
/* Switch to self-refresh. */
ldr tmp1, [r2, #UDDRC_PWRCTL]
- orr tmp1, tmp1, #UDDRC_PWRCTRL_SELFREF_SW
+ orr tmp1, tmp1, #UDDRC_PWRCTL_SELFREF_SW
str tmp1, [r2, #UDDRC_PWRCTL]
sr_ena_2:
@@ -276,7 +276,7 @@ sr_dis_5:
/* Trigger self-refresh exit. */
ldr tmp1, [r2, #UDDRC_PWRCTL]
- bic tmp1, tmp1, #UDDRC_PWRCTRL_SELFREF_SW
+ bic tmp1, tmp1, #UDDRC_PWRCTL_SELFREF_SW
str tmp1, [r2, #UDDRC_PWRCTL]
sr_dis_6:
diff --git a/include/soc/at91/sama7-ddr.h b/include/soc/at91/sama7-ddr.h
index 817b360efbb8..fee1b11bddca 100644
--- a/include/soc/at91/sama7-ddr.h
+++ b/include/soc/at91/sama7-ddr.h
@@ -53,7 +53,7 @@
#define UDDRC_STAT_OPMODE_MSK (0x7 << 0) /* Operating mode mask */
#define UDDRC_PWRCTL (0x30) /* UDDRC Low Power Control Register */
-#define UDDRC_PWRCTRL_SELFREF_SW (1 << 5) /* Software self-refresh */
+#define UDDRC_PWRCTL_SELFREF_SW (1 << 5) /* Software self-refresh */
#define UDDRC_DFIMISC (0x1B0) /* UDDRC DFI Miscellaneous Control Register */
#define UDDRC_DFIMISC_DFI_INIT_COMPLETE_EN (1 << 0) /* PHY initialization complete enable signal */
--
2.32.0
next prev parent reply other threads:[~2022-01-13 14:48 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-13 14:48 [PATCH v2 00/10] ARM: at91: add cpu idle and cpufreq opps for sama7g5 Claudiu Beznea
2022-01-13 14:48 ` [PATCH v2 01/10] ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency Claudiu Beznea
2022-01-13 14:48 ` [PATCH v2 02/10] ARM: at91: ddr: align macro definitions Claudiu Beznea
2022-01-13 14:48 ` Claudiu Beznea [this message]
2022-01-13 14:48 ` [PATCH v2 04/10] ARM: at91: PM: add cpu idle support for sama7g5 Claudiu Beznea
2022-01-13 14:48 ` [PATCH v2 05/10] ARM: at91: Kconfig: select PM_OPP Claudiu Beznea
2022-01-13 14:48 ` [PATCH v2 06/10] ARM: dts: at91: fix low limit for CPU regulator Claudiu Beznea
2022-01-13 14:48 ` [PATCH v2 07/10] ARM: dts: at91: sama7g5ek: set regulator voltages for standby state Claudiu Beznea
2022-01-13 14:48 ` [PATCH v2 08/10] ARM: dts: at91: sama7g5: add opps Claudiu Beznea
2022-01-13 14:48 ` [PATCH v2 09/10] ARM: configs: at91: sama7: enable cpu idle Claudiu Beznea
2022-01-13 14:49 ` [PATCH v2 10/10] ARM: configs: at91: sama7: add config for cpufreq Claudiu Beznea
2022-02-25 11:38 ` [PATCH v2 00/10] ARM: at91: add cpu idle and cpufreq opps for sama7g5 Nicolas Ferre
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