From: James Clark <james.clark@arm.com>
To: mathieu.poirier@linaro.org, coresight@lists.linaro.org
Cc: suzuki.poulose@arm.com, James Clark <james.clark@arm.com>,
Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 0/1] coresight: Fix TRCCONFIGR.QE sysfs interface
Date: Fri, 14 Jan 2022 17:32:53 +0000 [thread overview]
Message-ID: <20220114173254.1876151-1-james.clark@arm.com> (raw)
I was working on refactoring some of the magic numbers for the register
accesses and I saw this issue with programming one of the values.
I don't have any evidence that someone encountered it not working, probably
there is no hardware where QSUPP==0b10, or it just didn't get used yet.
But the issue is that this silently writes a reserved value even if the
user provided one was correct so it might ruin someones day if it ever
comes up.
It's a small change so I didn't see the harm in fixing it.
Applies to coresight/next f9809d565135
James Clark (1):
coresight: Fix TRCCONFIGR.QE sysfs interface
drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.17.1
next reply other threads:[~2022-01-14 17:33 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-14 17:32 James Clark [this message]
2022-01-14 17:32 ` [PATCH 1/1] " James Clark
2022-01-19 15:22 ` Mike Leach
2022-01-20 11:37 ` James Clark
2022-01-21 12:40 ` Mike Leach
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