From: Ben Chuang <benchuanggli@gmail.com>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org
Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
greg.tu@genesyslogic.com.tw, ben.chuang@genesyslogic.com.tw,
SeanHY.Chen@genesyslogic.com.tw,
Ben Chuang <benchuanggli@gmail.com>
Subject: [PATCH 2/3] mmc: sdhci-pci-gli: Enable SSC at 50MHz and 100MHz for GL9750 and GL9755
Date: Wed, 19 Jan 2022 15:53:39 +0800 [thread overview]
Message-ID: <20220119075339.36281-1-benchuanggli@gmail.com> (raw)
From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Enable SSC function at 50MHz and 100MHz for GL9750 and GL9755.
Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
---
drivers/mmc/host/sdhci-pci-gli.c | 36 ++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index 9ead32d73447..9de3d91283af 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -394,6 +394,20 @@ static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host)
gl9750_set_pll(host, 0x1, 0x246, 0x0);
}
+static void gl9750_set_ssc_pll_100mhz(struct sdhci_host *host)
+{
+ /* set pll to 100MHz and enable ssc */
+ gl9750_set_ssc(host, 0x1, 0xE, 0x51EC);
+ gl9750_set_pll(host, 0x1, 0x244, 0x1);
+}
+
+static void gl9750_set_ssc_pll_50mhz(struct sdhci_host *host)
+{
+ /* set pll to 50MHz and enable ssc */
+ gl9750_set_ssc(host, 0x1, 0xE, 0x51EC);
+ gl9750_set_pll(host, 0x1, 0x244, 0x3);
+}
+
static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
{
struct mmc_ios *ios = &host->mmc->ios;
@@ -411,6 +425,10 @@ static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
host->mmc->actual_clock = 205000000;
gl9750_set_ssc_pll_205mhz(host);
+ } else if (clock == 100000000) {
+ gl9750_set_ssc_pll_100mhz(host);
+ } else if (clock == 50000000) {
+ gl9750_set_ssc_pll_50mhz(host);
}
sdhci_enable_clk(host, clk);
@@ -537,6 +555,20 @@ static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev)
gl9755_set_pll(pdev, 0x1, 0x246, 0x0);
}
+static void gl9755_set_ssc_pll_100mhz(struct pci_dev *pdev)
+{
+ /* set pll to 100MHz and enable ssc */
+ gl9755_set_ssc(pdev, 0x1, 0xE, 0x51EC);
+ gl9755_set_pll(pdev, 0x1, 0x244, 0x1);
+}
+
+static void gl9755_set_ssc_pll_50mhz(struct pci_dev *pdev)
+{
+ /* set pll to 50MHz and enable ssc */
+ gl9755_set_ssc(pdev, 0x1, 0xE, 0x51EC);
+ gl9755_set_pll(pdev, 0x1, 0x244, 0x3);
+}
+
static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
{
struct sdhci_pci_slot *slot = sdhci_priv(host);
@@ -557,6 +589,10 @@ static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
host->mmc->actual_clock = 205000000;
gl9755_set_ssc_pll_205mhz(pdev);
+ } else if (clock == 100000000) {
+ gl9755_set_ssc_pll_100mhz(pdev);
+ } else if (clock == 50000000) {
+ gl9755_set_ssc_pll_50mhz(pdev);
}
sdhci_enable_clk(host, clk);
--
2.34.1
next reply other threads:[~2022-01-19 7:55 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-19 7:53 Ben Chuang [this message]
2022-01-24 14:41 ` Ulf Hansson
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