From: Terry Bowman <terry.bowman@amd.com>
To: <terry.bowman@amd.com>, <linux@roeck-us.net>,
<linux-watchdog@vger.kernel.org>, <jdelvare@suse.com>,
<linux-i2c@vger.kernel.org>, <wsa@kernel.org>,
<andy.shevchenko@gmail.com>, <rafael.j.wysocki@intel.com>
Cc: <linux-kernel@vger.kernel.org>, <wim@linux-watchdog.org>,
<rrichter@amd.com>, <thomas.lendacky@amd.com>,
<sudheesh.mavila@amd.com>, <Nehal-bakulchandra.Shah@amd.com>,
<Basavaraj.Natikar@amd.com>, <Shyam-sundar.S-k@amd.com>,
<Mario.Limonciello@amd.com>
Subject: [PATCH v3 7/9] i2c: piix4: Add EFCH MMIO support to SMBus base address detect
Date: Wed, 19 Jan 2022 17:06:24 -0600 [thread overview]
Message-ID: <20220119230626.31560-8-terry.bowman@amd.com> (raw)
In-Reply-To: <20220119230626.31560-1-terry.bowman@amd.com>
The EFCH SMBus controller's base address is determined using details in
FCH::PM::DECODEEN[smbusasfiobase] and FCH::PM::DECODEEN[smbusasfioen].
This code also writes to FCH::PM::ISACONTROL[mmioen] to enable MMIO
decoding. These register fields were accessed using cd6h/cd7h port I/O.
cd6h/cd7h port I/O is no longer available in later AMD processors.
Change base address detection to use MMIO instead of port I/O cd6h/cd7h.
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
---
drivers/i2c/busses/i2c-piix4.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 7aa6ceb27e4b..b85f926451b8 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -98,6 +98,7 @@
#define SB800_PIIX4_PORT_IDX_MASK_KERNCZ 0x18
#define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ 3
+#define SB800_PIIX4_FCH_PM_DECODEEN_MMIO BIT(1)
#define SB800_PIIX4_FCH_PM_ADDR 0xFED80300
#define SB800_PIIX4_FCH_PM_SIZE 8
@@ -344,10 +345,18 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev,
if (retval)
return retval;
- outb_p(smb_en, SB800_PIIX4_SMB_IDX);
- smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
- outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
- smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
+ if (mmio_cfg.use_mmio) {
+ iowrite32(ioread32(mmio_cfg.addr + 4) | SB800_PIIX4_FCH_PM_DECODEEN_MMIO,
+ mmio_cfg.addr + 4);
+
+ smba_en_lo = ioread8(mmio_cfg.addr);
+ smba_en_hi = ioread8(mmio_cfg.addr + 1);
+ } else {
+ outb_p(smb_en, SB800_PIIX4_SMB_IDX);
+ smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
+ outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
+ smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
+ }
piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg);
--
2.30.2
next prev parent reply other threads:[~2022-01-19 23:09 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-19 23:06 [PATCH v3 0/9] i2c: piix4: Replace cd6h/cd7h port I/O accesses with MMIO accesses Terry Bowman
2022-01-19 23:06 ` [PATCH v3 1/9] kernel/resource: Introduce request_muxed_mem_region() Terry Bowman
2022-01-20 11:16 ` Andy Shevchenko
2022-01-20 13:53 ` Terry Bowman
2022-01-19 23:06 ` [PATCH v3 2/9] i2c: piix4: Replace hardcoded memory map size with a #define Terry Bowman
2022-01-19 23:06 ` [PATCH v3 3/9] i2c: piix4: Move port I/O region request/release code into functions Terry Bowman
2022-01-19 23:06 ` [PATCH v3 4/9] i2c: piix4: Move SMBus controller base address detect into function Terry Bowman
2022-01-19 23:06 ` [PATCH v3 5/9] i2c: piix4: Move SMBus port selection " Terry Bowman
2022-01-19 23:06 ` [PATCH v3 6/9] i2c: piix4: Add EFCH MMIO support to region request and release Terry Bowman
2022-01-19 23:06 ` Terry Bowman [this message]
2022-01-20 11:27 ` [PATCH v3 7/9] i2c: piix4: Add EFCH MMIO support to SMBus base address detect Andy Shevchenko
2022-01-20 13:59 ` Terry Bowman
2022-01-24 21:04 ` Terry Bowman
2022-01-27 21:35 ` Wolfram Sang
2022-01-19 23:06 ` [PATCH v3 8/9] i2c: piix4: Add EFCH MMIO support for SMBus port select Terry Bowman
2022-01-20 11:28 ` Andy Shevchenko
2022-01-20 14:00 ` Terry Bowman
2022-01-21 21:02 ` Terry Bowman
2022-01-21 21:07 ` Wolfram Sang
2022-01-19 23:06 ` [PATCH v3 9/9] i2c: piix4: Enable EFCH MMIO for Family 17h+ Terry Bowman
2022-01-20 11:30 ` [PATCH v3 0/9] i2c: piix4: Replace cd6h/cd7h port I/O accesses with MMIO accesses Andy Shevchenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220119230626.31560-8-terry.bowman@amd.com \
--to=terry.bowman@amd.com \
--cc=Basavaraj.Natikar@amd.com \
--cc=Mario.Limonciello@amd.com \
--cc=Nehal-bakulchandra.Shah@amd.com \
--cc=Shyam-sundar.S-k@amd.com \
--cc=andy.shevchenko@gmail.com \
--cc=jdelvare@suse.com \
--cc=linux-i2c@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-watchdog@vger.kernel.org \
--cc=linux@roeck-us.net \
--cc=rafael.j.wysocki@intel.com \
--cc=rrichter@amd.com \
--cc=sudheesh.mavila@amd.com \
--cc=thomas.lendacky@amd.com \
--cc=wim@linux-watchdog.org \
--cc=wsa@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome