[cxl:preview 45/53] drivers/cxl/core/port.c:853:26: error: use of undeclared identifier 'CXL_REGLOC_RBI_COMPONENT'

[kernel test robot <lkp@intel.com>]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git preview
head:   e675fabdbbcdb6e32dba688a20fb0bd42e0e2d5d
commit: bdcd1df24905ea3d8196ef7e62b077b136d18ab1 [45/53] cxl/core/port: Add switch port enumeration
config: mips-randconfig-c004-20220120 (https://download.01.org/0day-ci/archive/20220123/202201230041.j2B2ds4Z-lkp@intel.com/config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 7b3d30728816403d1fd73cc5082e9fb761262bce)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install mips cross compiling tool for clang build
        # apt-get install binutils-mips-linux-gnu
        # https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git/commit/?id=bdcd1df24905ea3d8196ef7e62b077b136d18ab1
        git remote add cxl https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git
        git fetch --no-tags cxl preview
        git checkout bdcd1df24905ea3d8196ef7e62b077b136d18ab1
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=mips SHELL=/bin/bash drivers/cxl/core/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/cxl/core/port.c:853:26: error: use of undeclared identifier 'CXL_REGLOC_RBI_COMPONENT'
           cxl_find_regblock(pdev, CXL_REGLOC_RBI_COMPONENT, &map);
                                   ^
>> drivers/cxl/core/port.c:854:9: error: implicit declaration of function 'cxl_regmap_to_base' [-Werror,-Wimplicit-function-declaration]
           return cxl_regmap_to_base(pdev, &map);
                  ^
   drivers/cxl/core/port.c:998:18: warning: no previous prototype for function 'cxl_mem_find_port' [-Wmissing-prototypes]
   struct cxl_port *cxl_mem_find_port(struct cxl_memdev *cxlmd)
                    ^
   drivers/cxl/core/port.c:998:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct cxl_port *cxl_mem_find_port(struct cxl_memdev *cxlmd)
   ^
   static 
   1 warning and 2 errors generated.


vim +/CXL_REGLOC_RBI_COMPONENT +853 drivers/cxl/core/port.c

   838	
   839	static resource_size_t find_component_registers(struct device *dev)
   840	{
   841		struct cxl_register_map map;
   842		struct pci_dev *pdev;
   843	
   844		/*
   845		 * Theoretically, CXL component registers can be hosted on a
   846		 * non-PCI device, in practice, only cxl_test hits this case.
   847		 */
   848		if (!dev_is_pci(dev))
   849			return CXL_RESOURCE_NONE;
   850	
   851		pdev = to_pci_dev(dev);
   852	
 > 853		cxl_find_regblock(pdev, CXL_REGLOC_RBI_COMPONENT, &map);
 > 854		return cxl_regmap_to_base(pdev, &map);
   855	}
   856	

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0-DAY CI Kernel Test Service, Intel Corporation
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