From: Ayush Ranjan <ayushranjan@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Ben Gardon <bgardon@google.com>,
Jim Mattson <jmattson@google.com>,
Andrei Vagin <avagin@gmail.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Michael Pratt <mpratt@google.com>,
Ayush Ranjan <ayushranjan@google.com>
Subject: [PATCH] x86: add additional EPT bit definitions
Date: Sun, 23 Jan 2022 11:52:39 -0800 [thread overview]
Message-ID: <20220123195239.509528-1-ayushranjan@google.com> (raw)
From: Michael Pratt <mpratt@google.com>
Used in gvisor for EPT support.
Tested: Builds cleanly
Signed-off-by: Ayush Ranjan <ayushranjan@google.com>
Signed-off-by: Michael Pratt <mpratt@google.com>
---
arch/x86/include/asm/vmx.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 0ffaa3156a4e..c77ad687cdf7 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -496,7 +496,9 @@ enum vmcs_field {
#define VMX_EPT_WRITABLE_MASK 0x2ull
#define VMX_EPT_EXECUTABLE_MASK 0x4ull
#define VMX_EPT_IPAT_BIT (1ull << 6)
-#define VMX_EPT_ACCESS_BIT (1ull << 8)
+#define VMX_EPT_PSE_BIT (1ull << 7)
+#define VMX_EPT_ACCESS_SHIFT 8
+#define VMX_EPT_ACCESS_BIT (1ull << VMX_EPT_ACCESS_SHIFT)
#define VMX_EPT_DIRTY_BIT (1ull << 9)
#define VMX_EPT_RWX_MASK (VMX_EPT_READABLE_MASK | \
VMX_EPT_WRITABLE_MASK | \
--
2.35.0.rc0.227.g00780c9af4-goog
next reply other threads:[~2022-01-23 19:53 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-23 19:52 Ayush Ranjan [this message]
2022-01-24 17:24 ` Sean Christopherson
2022-01-25 8:51 ` Ayush Ranjan
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