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[80.71.140.73]) by smtp.gmail.com with ESMTPSA id a26sm16041676oiy.26.2022.01.31.10.27.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 10:28:00 -0800 (PST) Sender: Emil Renner Berthing From: Emil Renner Berthing To: linux-riscv@lists.infradead.org Cc: Emil Renner Berthing , Paul Walmsley , Palmer Dabbelt , Albert Ou , Peter Zijlstra , Josh Poimboeuf , Jason Baron , Steven Rostedt , Ard Biesheuvel , Alexandre Ghiti , Jisheng Zhang , linux-kernel@vger.kernel.org Subject: [PATCH v2 6/7] riscv: Use asm/insn.h to generate plt entries Date: Mon, 31 Jan 2022 19:27:19 +0100 Message-Id: <20220131182720.236065-7-kernel@esmil.dk> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220131182720.236065-1-kernel@esmil.dk> References: <20220131182720.236065-1-kernel@esmil.dk> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This converts kernel/module-sections.c to use asm/insn.h to generate the instructions in the plt entries. Signed-off-by: Emil Renner Berthing --- arch/riscv/kernel/module-sections.c | 27 ++++----------------------- 1 file changed, 4 insertions(+), 23 deletions(-) diff --git a/arch/riscv/kernel/module-sections.c b/arch/riscv/kernel/module-sections.c index 39d4ac681c2a..cb73399c3603 100644 --- a/arch/riscv/kernel/module-sections.c +++ b/arch/riscv/kernel/module-sections.c @@ -9,6 +9,7 @@ #include #include #include +#include struct got_entry { unsigned long symbol_addr; /* the real variable address */ @@ -61,36 +62,16 @@ struct plt_entry { u32 insn_jr; /* jr t1 */ }; -#define OPC_AUIPC 0x0017 -#define OPC_LD 0x3003 -#define OPC_JALR 0x0067 -#define REG_T0 0x5 -#define REG_T1 0x6 - static struct plt_entry emit_plt_entry(unsigned long val, unsigned long plt, unsigned long got_plt) { - /* - * U-Type encoding: - * +------------+----------+----------+ - * | imm[31:12] | rd[11:7] | opc[6:0] | - * +------------+----------+----------+ - * - * I-Type encoding: - * +------------+------------+--------+----------+----------+ - * | imm[31:20] | rs1[19:15] | funct3 | rd[11:7] | opc[6:0] | - * +------------+------------+--------+----------+----------+ - * - */ unsigned long offset = got_plt - plt; - u32 hi20 = (offset + 0x800) & 0xfffff000; - u32 lo12 = (offset - hi20); return (struct plt_entry) { - OPC_AUIPC | (REG_T0 << 7) | hi20, - OPC_LD | (lo12 << 20) | (REG_T0 << 15) | (REG_T1 << 7), - OPC_JALR | (REG_T1 << 15) + RISCV_INSN_AUIPC | RISCV_INSN_RD_T0 | riscv_insn_u_imm(offset + 0x800), + RISCV_INSN_LD | RISCV_INSN_RD_T1 | RISCV_INSN_RS1_T0 | riscv_insn_i_imm(offset), + RISCV_INSN_JALR | RISCV_INSN_RS1_T1, }; } -- 2.35.1