From: Daniel Vacek <neelx@redhat.com>
To: "H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH] [RFC] apic: fix timer base macro definitions
Date: Wed, 2 Feb 2022 15:02:44 +0100 [thread overview]
Message-ID: <20220202140244.1681140-1-neelx@redhat.com> (raw)
I was wondering if the aliasing of APIC_TIMER_BASE_TMBASE and
APIC_LVT_TIMER_TSCDEADLINE was intentional or we need to << 19?
Also it seems the GET_APIC_TIMER_BASE, APIC_TIMER_BASE_CLKIN and
APIC_TIMER_BASE_TMBASE are not even being used. Perhaps, can we
just remove them?
Signed-off-by: Daniel Vacek <neelx@redhat.com>
---
arch/x86/include/asm/apicdef.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
index 5716f22f81ac..00b4ca49f3ea 100644
--- a/arch/x86/include/asm/apicdef.h
+++ b/arch/x86/include/asm/apicdef.h
@@ -95,9 +95,9 @@
#define APIC_LVTTHMR 0x330
#define APIC_LVTPC 0x340
#define APIC_LVT0 0x350
-#define APIC_LVT_TIMER_BASE_MASK (0x3 << 18)
-#define GET_APIC_TIMER_BASE(x) (((x) >> 18) & 0x3)
-#define SET_APIC_TIMER_BASE(x) (((x) << 18))
+#define APIC_LVT_TIMER_BASE_MASK (0x3 << 19)
+#define GET_APIC_TIMER_BASE(x) (((x) >> 19) & 0x3)
+#define SET_APIC_TIMER_BASE(x) (((x) << 19))
#define APIC_TIMER_BASE_CLKIN 0x0
#define APIC_TIMER_BASE_TMBASE 0x1
#define APIC_TIMER_BASE_DIV 0x2
--
2.34.1
next reply other threads:[~2022-02-02 14:03 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-02 14:02 Daniel Vacek [this message]
2022-04-06 11:47 ` Thomas Gleixner
2022-04-06 14:54 ` Daniel Vacek
2022-04-12 20:34 ` [PATCH] x86/apic: Clarify i82489DX bit overlap in APIC_LVT0 Thomas Gleixner
2022-04-12 22:17 ` Maciej W. Rozycki
2022-04-13 13:24 ` Thomas Gleixner
2022-04-13 15:55 ` Maciej W. Rozycki
2022-04-13 16:44 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
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