From: Guenter Roeck <linux@roeck-us.net>
To: Terry Bowman <terry.bowman@amd.com>
Cc: linux-watchdog@vger.kernel.org, jdelvare@suse.com,
linux-i2c@vger.kernel.org, wsa@kernel.org,
andy.shevchenko@gmail.com, rafael.j.wysocki@intel.com,
linux-kernel@vger.kernel.org, wim@linux-watchdog.org,
rrichter@amd.com, thomas.lendacky@amd.com,
sudheesh.mavila@amd.com, Nehal-bakulchandra.Shah@amd.com,
Basavaraj.Natikar@amd.com, Shyam-sundar.S-k@amd.com,
Mario.Limonciello@amd.com
Subject: Re: [PATCH v5 2/4] Watchdog: sp5100_tco: Refactor MMIO base address initialization
Date: Wed, 2 Feb 2022 11:51:31 -0800 [thread overview]
Message-ID: <20220202195131.GB2346468@roeck-us.net> (raw)
In-Reply-To: <20220202153525.1693378-3-terry.bowman@amd.com>
On Wed, Feb 02, 2022 at 09:35:23AM -0600, Terry Bowman wrote:
> Combine MMIO base address and alternate base address detection. Combine
> based on layout type. This will simplify the function by eliminating
> a switch case.
>
> Move existing request/release code into functions. This currently only
> supports port I/O request/release. The move into a separate function
> will make it ready for adding MMIO region support.
>
> Co-developed-by: Robert Richter <rrichter@amd.com>
> Signed-off-by: Robert Richter <rrichter@amd.com>
> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> Tested-by: Jean Delvare <jdelvare@suse.de>
> Reviewed-by: Jean Delvare <jdelvare@suse.de>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> drivers/watchdog/sp5100_tco.c | 155 ++++++++++++++++++----------------
> drivers/watchdog/sp5100_tco.h | 1 +
> 2 files changed, 82 insertions(+), 74 deletions(-)
>
> diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c
> index b365bbc9ac36..8db7504f0aa4 100644
> --- a/drivers/watchdog/sp5100_tco.c
> +++ b/drivers/watchdog/sp5100_tco.c
> @@ -223,6 +223,55 @@ static u32 sp5100_tco_read_pm_reg32(u8 index)
> return val;
> }
>
> +static u32 sp5100_tco_request_region(struct device *dev,
> + u32 mmio_addr,
> + const char *dev_name)
> +{
> + if (!devm_request_mem_region(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE,
> + dev_name)) {
> + dev_dbg(dev, "MMIO address 0x%08x already in use\n", mmio_addr);
> + return 0;
> + }
> +
> + return mmio_addr;
> +}
> +
> +static u32 sp5100_tco_prepare_base(struct sp5100_tco *tco,
> + u32 mmio_addr,
> + u32 alt_mmio_addr,
> + const char *dev_name)
> +{
> + struct device *dev = tco->wdd.parent;
> +
> + dev_dbg(dev, "Got 0x%08x from SBResource_MMIO register\n", mmio_addr);
> +
> + if (!mmio_addr && !alt_mmio_addr)
> + return -ENODEV;
> +
> + /* Check for MMIO address and alternate MMIO address conflicts */
> + if (mmio_addr)
> + mmio_addr = sp5100_tco_request_region(dev, mmio_addr, dev_name);
> +
> + if (!mmio_addr && alt_mmio_addr)
> + mmio_addr = sp5100_tco_request_region(dev, alt_mmio_addr, dev_name);
> +
> + if (!mmio_addr) {
> + dev_err(dev, "Failed to reserve MMIO or alternate MMIO region\n");
> + return -EBUSY;
> + }
> +
> + tco->tcobase = devm_ioremap(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE);
> + if (!tco->tcobase) {
> + dev_err(dev, "MMIO address 0x%08x failed mapping\n", mmio_addr);
> + devm_release_mem_region(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE);
> + return -ENOMEM;
> + }
> +
> + dev_info(dev, "Using 0x%08x for watchdog MMIO address\n", mmio_addr);
> +
> + return 0;
> +}
> +
> static int sp5100_tco_timer_init(struct sp5100_tco *tco)
> {
> struct watchdog_device *wdd = &tco->wdd;
> @@ -264,6 +313,7 @@ static int sp5100_tco_setupdevice(struct device *dev,
> struct sp5100_tco *tco = watchdog_get_drvdata(wdd);
> const char *dev_name;
> u32 mmio_addr = 0, val;
> + u32 alt_mmio_addr = 0;
> int ret;
>
> /* Request the IO ports used by this driver */
> @@ -282,11 +332,32 @@ static int sp5100_tco_setupdevice(struct device *dev,
> dev_name = SP5100_DEVNAME;
> mmio_addr = sp5100_tco_read_pm_reg32(SP5100_PM_WATCHDOG_BASE) &
> 0xfffffff8;
> +
> + /*
> + * Secondly, find the watchdog timer MMIO address
> + * from SBResource_MMIO register.
> + */
> +
> + /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
> + pci_read_config_dword(sp5100_tco_pci,
> + SP5100_SB_RESOURCE_MMIO_BASE,
> + &val);
> +
> + /* Verify MMIO is enabled and using bar0 */
> + if ((val & SB800_ACPI_MMIO_MASK) == SB800_ACPI_MMIO_DECODE_EN)
> + alt_mmio_addr = (val & ~0xfff) + SB800_PM_WDT_MMIO_OFFSET;
> break;
> case sb800:
> dev_name = SB800_DEVNAME;
> mmio_addr = sp5100_tco_read_pm_reg32(SB800_PM_WATCHDOG_BASE) &
> 0xfffffff8;
> +
> + /* Read SBResource_MMIO from AcpiMmioEn(PM_Reg: 24h) */
> + val = sp5100_tco_read_pm_reg32(SB800_PM_ACPI_MMIO_EN);
> +
> + /* Verify MMIO is enabled and using bar0 */
> + if ((val & SB800_ACPI_MMIO_MASK) == SB800_ACPI_MMIO_DECODE_EN)
> + alt_mmio_addr = (val & ~0xfff) + SB800_PM_WDT_MMIO_OFFSET;
> break;
> case efch:
> dev_name = SB800_DEVNAME;
> @@ -305,87 +376,23 @@ static int sp5100_tco_setupdevice(struct device *dev,
> val = sp5100_tco_read_pm_reg8(EFCH_PM_DECODEEN);
> if (val & EFCH_PM_DECODEEN_WDT_TMREN)
> mmio_addr = EFCH_PM_WDT_ADDR;
> +
> + val = sp5100_tco_read_pm_reg8(EFCH_PM_ISACONTROL);
> + if (val & EFCH_PM_ISACONTROL_MMIOEN)
> + alt_mmio_addr = EFCH_PM_ACPI_MMIO_ADDR +
> + EFCH_PM_ACPI_MMIO_WDT_OFFSET;
> break;
> default:
> return -ENODEV;
> }
>
> - /* Check MMIO address conflict */
> - if (!mmio_addr ||
> - !devm_request_mem_region(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE,
> - dev_name)) {
> - if (mmio_addr)
> - dev_dbg(dev, "MMIO address 0x%08x already in use\n",
> - mmio_addr);
> - switch (tco->tco_reg_layout) {
> - case sp5100:
> - /*
> - * Secondly, Find the watchdog timer MMIO address
> - * from SBResource_MMIO register.
> - */
> - /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
> - pci_read_config_dword(sp5100_tco_pci,
> - SP5100_SB_RESOURCE_MMIO_BASE,
> - &mmio_addr);
> - if ((mmio_addr & (SB800_ACPI_MMIO_DECODE_EN |
> - SB800_ACPI_MMIO_SEL)) !=
> - SB800_ACPI_MMIO_DECODE_EN) {
> - ret = -ENODEV;
> - goto unreg_region;
> - }
> - mmio_addr &= ~0xFFF;
> - mmio_addr += SB800_PM_WDT_MMIO_OFFSET;
> - break;
> - case sb800:
> - /* Read SBResource_MMIO from AcpiMmioEn(PM_Reg: 24h) */
> - mmio_addr =
> - sp5100_tco_read_pm_reg32(SB800_PM_ACPI_MMIO_EN);
> - if ((mmio_addr & (SB800_ACPI_MMIO_DECODE_EN |
> - SB800_ACPI_MMIO_SEL)) !=
> - SB800_ACPI_MMIO_DECODE_EN) {
> - ret = -ENODEV;
> - goto unreg_region;
> - }
> - mmio_addr &= ~0xFFF;
> - mmio_addr += SB800_PM_WDT_MMIO_OFFSET;
> - break;
> - case efch:
> - val = sp5100_tco_read_pm_reg8(EFCH_PM_ISACONTROL);
> - if (!(val & EFCH_PM_ISACONTROL_MMIOEN)) {
> - ret = -ENODEV;
> - goto unreg_region;
> - }
> - mmio_addr = EFCH_PM_ACPI_MMIO_ADDR +
> - EFCH_PM_ACPI_MMIO_WDT_OFFSET;
> - break;
> - }
> - dev_dbg(dev, "Got 0x%08x from SBResource_MMIO register\n",
> - mmio_addr);
> - if (!devm_request_mem_region(dev, mmio_addr,
> - SP5100_WDT_MEM_MAP_SIZE,
> - dev_name)) {
> - dev_dbg(dev, "MMIO address 0x%08x already in use\n",
> - mmio_addr);
> - ret = -EBUSY;
> - goto unreg_region;
> - }
> - }
> -
> - tco->tcobase = devm_ioremap(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE);
> - if (!tco->tcobase) {
> - dev_err(dev, "failed to get tcobase address\n");
> - ret = -ENOMEM;
> - goto unreg_region;
> + ret = sp5100_tco_prepare_base(tco, mmio_addr, alt_mmio_addr, dev_name);
> + if (!ret) {
> + /* Setup the watchdog timer */
> + tco_timer_enable(tco);
> + ret = sp5100_tco_timer_init(tco);
> }
>
> - dev_info(dev, "Using 0x%08x for watchdog MMIO address\n", mmio_addr);
> -
> - /* Setup the watchdog timer */
> - tco_timer_enable(tco);
> -
> - ret = sp5100_tco_timer_init(tco);
> -
> -unreg_region:
> release_region(SP5100_IO_PM_INDEX_REG, SP5100_PM_IOPORTS_SIZE);
> return ret;
> }
> diff --git a/drivers/watchdog/sp5100_tco.h b/drivers/watchdog/sp5100_tco.h
> index adf015aa4126..daee872f9b71 100644
> --- a/drivers/watchdog/sp5100_tco.h
> +++ b/drivers/watchdog/sp5100_tco.h
> @@ -58,6 +58,7 @@
> #define SB800_PM_WATCHDOG_SECOND_RES GENMASK(1, 0)
> #define SB800_ACPI_MMIO_DECODE_EN BIT(0)
> #define SB800_ACPI_MMIO_SEL BIT(1)
> +#define SB800_ACPI_MMIO_MASK GENMASK(1, 0)
>
> #define SB800_PM_WDT_MMIO_OFFSET 0xB00
>
> --
> 2.30.2
>
next prev parent reply other threads:[~2022-02-02 19:51 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-02 15:35 [PATCH v5 0/4] Watchdog: sp5100_tco: Replace cd6h/cd7h port I/O accesses with MMIO accesses Terry Bowman
2022-02-02 15:35 ` [PATCH v5 1/4] Watchdog: sp5100_tco: Move timer initialization into function Terry Bowman
2022-02-02 19:51 ` Guenter Roeck
2022-02-02 15:35 ` [PATCH v5 2/4] Watchdog: sp5100_tco: Refactor MMIO base address initialization Terry Bowman
2022-02-02 19:51 ` Guenter Roeck [this message]
2022-02-02 15:35 ` [PATCH v5 3/4] Watchdog: sp5100_tco: Add initialization using EFCH MMIO Terry Bowman
2022-02-02 19:51 ` Guenter Roeck
2022-02-02 15:35 ` [PATCH v5 4/4] Watchdog: sp5100_tco: Enable Family 17h+ CPUs Terry Bowman
2022-02-02 19:51 ` Guenter Roeck
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