From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C10A9C4332F for ; Fri, 11 Feb 2022 04:54:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244823AbiBKEyQ (ORCPT ); Thu, 10 Feb 2022 23:54:16 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244094AbiBKEyJ (ORCPT ); Thu, 10 Feb 2022 23:54:09 -0500 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 740082637; Thu, 10 Feb 2022 20:54:08 -0800 (PST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 21AJQjBl009503; Thu, 10 Feb 2022 20:53:56 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=VM35EtDqc0bxpU5ShbW9vWWkT+wnc3BSOaAUbWUZa+M=; b=H3aacF1IiyxtRfC1mAu6Z4bv2XWRgihSQgrsmkbcOocHNylOh179k8j8enLnF7107yr/ RIeRdVjKxc7lel1BUQRJHUoHMibU80ZimPVCwvArQlofeQ4oXdTK5SUc6SWMZDMGX5PS HNCV7YScmitdtVxvCmwBTkuUrV4mW7Fyle+3w5VFmGRKLrzxf/UffaNgn8yuscFWUx0+ 9cgoBYYPNqfXHGrMn3HuQpNs5PLqhUBt3GS9/spjAN4ECbmFkXK7LIhaNMBHtl6UTXSO HjqQIqHYtdHlGcEMtVeOwCt3RcXWBBx1d6fO7ZxG1x2IhIMRk/he0mQGeCfBrFIvp995 fg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3e50uccad6-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 10 Feb 2022 20:53:56 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 10 Feb 2022 20:53:55 -0800 Received: from bbhushan2.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 10 Feb 2022 20:53:52 -0800 From: Bharat Bhushan To: , , , , , , , CC: Bharat Bhushan Subject: [PATCH v8 1/4] dt-bindings: perf: marvell: cn10k ddr performance monitor Date: Fri, 11 Feb 2022 10:23:43 +0530 Message-ID: <20220211045346.17894-2-bbhushan2@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220211045346.17894-1-bbhushan2@marvell.com> References: <20220211045346.17894-1-bbhushan2@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: q5wEtlVBDI6RiKmFt_btNuOaMc4O9Prw X-Proofpoint-ORIG-GUID: q5wEtlVBDI6RiKmFt_btNuOaMc4O9Prw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-11_01,2022-02-09_01,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding documentation for the Marvell CN10k DDR performance monitor unit. Signed-off-by: Bharat Bhushan Reviewed-by: Rob Herring --- v7->v8: - No change .../bindings/perf/marvell-cn10k-ddr.yaml | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml diff --git a/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml new file mode 100644 index 000000000000..a18dd0a8c43a --- /dev/null +++ b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/marvell-cn10k-ddr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell CN10K DDR performance monitor + +maintainers: + - Bharat Bhushan + +properties: + compatible: + items: + - enum: + - marvell,cn10k-ddr-pmu + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + pmu@87e1c0000000 { + compatible = "marvell,cn10k-ddr-pmu"; + reg = <0x87e1 0xc0000000 0x0 0x10000>; + }; + }; -- 2.17.1