From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98F80C433FE for ; Thu, 17 Feb 2022 14:39:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241828AbiBQOjT (ORCPT ); Thu, 17 Feb 2022 09:39:19 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:56490 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231239AbiBQOjR (ORCPT ); Thu, 17 Feb 2022 09:39:17 -0500 Received: from relay05.th.seeweb.it (relay05.th.seeweb.it [IPv6:2001:4b7a:2000:18::166]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70ACC2944CB for ; Thu, 17 Feb 2022 06:39:01 -0800 (PST) Received: from SoMainline.org (94-209-165-62.cable.dynamic.v4.ziggo.nl [94.209.165.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 9E53C3F804; Thu, 17 Feb 2022 15:38:57 +0100 (CET) Date: Thu, 17 Feb 2022 15:38:56 +0100 From: Marijn Suijten To: Vinod Koul Cc: Jonathan Marek , David Airlie , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Abhinav Kumar , Bjorn Andersson , Rob Clark , dri-devel@lists.freedesktop.org, Daniel Vetter , Dmitry Baryshkov , freedreno@lists.freedesktop.org Subject: Re: [Freedreno] [REPOST PATCH v4 13/13] drm/msm/dsi: Add support for DSC configuration Message-ID: <20220217143856.dwdqlb2v5q6nnbin@SoMainline.org> References: <20220210103423.271016-1-vkoul@kernel.org> <20220210103423.271016-14-vkoul@kernel.org> <20220217092707.2bfzga74xyicl4kb@SoMainline.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Vinod, On 2022-02-17 16:21:35, Vinod Koul wrote: > Hi Marijn, > > On 17-02-22, 10:27, Marijn Suijten wrote: > > Vinod, > > > > On 2022-02-10 16:04:23, Vinod Koul wrote: > > > When DSC is enabled, we need to configure DSI registers accordingly and > > > configure the respective stream compression registers. > > > > > > Add support to calculate the register setting based on DSC params and > > > timing information and configure these registers. > > > > > > Signed-off-by: Dmitry Baryshkov > > > Signed-off-by: Vinod Koul > > > > I supplied a rather extensive - yet merely scratching the surface - > > review of this patch in: > > > > https://lore.kernel.org/linux-arm-msm/20211211000315.pavmcc7cc73ilb6l@SoMainline.org/ > > Sorry somehow I seem to have overlooked this one. Glad to hear it was only just missed, hope it helps making these patches truly a step-up from the downstream driver it was based on :) > > > > It seems none of those points have been addressed, bar creating a mesa > > MR to update dsi.xml with a subpar description of the registers (offsets > > only). > > Mesa MR was planned as we get more closer to having reviews. I would have submitted them in parallel straight away and link them together, so that review can commence immediately on both. Perhaps then the XML could be merged up-front so that these patches don't need to block on a stable commit-hash to regenerate the headers from? In this case I/we would have immediately requested to move all the register constants and offsets (even those that currently have an unknown meaning) into the XML, and we can later fill in the details. > > For every point that is intentionally ignored, please at least supply a > > justification of why you think this is the right thing to do. > > Ofcourse, i will reply to these now and address as required. Thanks, I'll try to clarify some points ASAP before you respin this. - Marijn