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[189.47.54.110]) by smtp.gmail.com with ESMTPSA id w3-20020a056830110300b005af14392276sm79509otq.62.2022.02.24.11.16.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 11:16:48 -0800 (PST) From: Magali Lemes To: harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@linux.ie, daniel@ffwll.ch Cc: siqueirajordao@riseup.net, mwen@igalia.com, maira.canal@usp.br, isabbasso@riseup.net, Magali Lemes , Qingqing Zhuo , kernel test robot , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] drm/amd/display: Turn functions into static Date: Thu, 24 Feb 2022 16:15:51 -0300 Message-Id: <20220224191551.69103-5-magalilemes00@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220224191551.69103-1-magalilemes00@gmail.com> References: <20220224191551.69103-1-magalilemes00@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Silence [-Wmissing-prototypes] sparse warnings from the display folder such as: ../drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_smu.c:126:5: warning: no previous prototype for ‘dcn315_smu_send_msg_with_param’ [-Wmissing-prototypes] 126 | int dcn315_smu_send_msg_with_param( | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Cc: Qingqing Zhuo (Lillian) Reported-by: kernel test robot Signed-off-by: Magali Lemes --- .../gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c | 2 +- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c | 4 ++-- .../gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c index d66633bef2b3..357f89b4a8e0 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c @@ -430,7 +430,7 @@ static unsigned int find_clk_for_voltage( return 0; } -void dcn315_clk_mgr_helper_populate_bw_params( +static void dcn315_clk_mgr_helper_populate_bw_params( struct clk_mgr_internal *clk_mgr, struct integrated_info *bios_info, const DpmClocks_315_t *clock_table) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c index a60543258a5b..831fd1494d60 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c @@ -123,7 +123,7 @@ static uint32_t dcn315_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, u return res_val; } -int dcn315_smu_send_msg_with_param( +static int dcn315_smu_send_msg_with_param( struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigned int param) { @@ -181,7 +181,7 @@ int dcn315_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispc return actual_dispclk_set_mhz * 1000; } -int dcn315_smu_set_voltage_via_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz) +static int dcn315_smu_set_voltage_via_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz) { int actual_phypclk_set_mhz = -1; diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c b/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c index 33367773699b..e722171f0d2d 100644 --- a/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c @@ -42,7 +42,7 @@ #define DCN_BASE__INST0_SEG4 0x02403C00 #define DCN_BASE__INST0_SEG5 0 -enum dc_irq_source to_dal_irq_source_dcn315( +static enum dc_irq_source to_dal_irq_source_dcn315( struct irq_service *irq_service, uint32_t src_id, uint32_t ext_id) -- 2.25.1