mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: kernel test robot <lkp@intel.com>
To: Atish Patra <atishp@rivosinc.com>
Cc: kbuild-all@lists.01.org, Atish Patra <Atish.Patra@wdc.com>,
	linux-kernel@vger.kernel.org
Subject: [atishp04:sstc_v1 14/14] arch/riscv/kvm/vcpu_timer.c:312:55: warning: right shift count >= width of type
Date: Sun, 27 Feb 2022 13:26:23 +0800	[thread overview]
Message-ID: <202202271321.biwCXG9G-lkp@intel.com> (raw)

tree:   https://github.com/atishp04/linux sstc_v1
head:   8904ca0d06f70e6d150b60b72d5ce21044ac9208
commit: 8904ca0d06f70e6d150b60b72d5ce21044ac9208 [14/14] RISC-V: KVM: Support sstc extension
config: riscv-randconfig-r001-20220227 (https://download.01.org/0day-ci/archive/20220227/202202271321.biwCXG9G-lkp@intel.com/config)
compiler: riscv32-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/atishp04/linux/commit/8904ca0d06f70e6d150b60b72d5ce21044ac9208
        git remote add atishp04 https://github.com/atishp04/linux
        git fetch --no-tags atishp04 sstc_v1
        git checkout 8904ca0d06f70e6d150b60b72d5ce21044ac9208
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   In file included from arch/riscv/include/asm/ptrace.h:10,
                    from arch/riscv/include/asm/processor.h:13,
                    from arch/riscv/include/asm/irqflags.h:10,
                    from include/linux/irqflags.h:16,
                    from arch/riscv/include/asm/bitops.h:14,
                    from include/linux/bitops.h:33,
                    from include/linux/log2.h:12,
                    from include/asm-generic/div64.h:55,
                    from ./arch/riscv/include/generated/asm/div64.h:1,
                    from include/linux/math.h:5,
                    from include/linux/math64.h:6,
                    from include/linux/time64.h:5,
                    from include/linux/restart_block.h:10,
                    from include/linux/thread_info.h:14,
                    from include/asm-generic/preempt.h:5,
                    from ./arch/riscv/include/generated/asm/preempt.h:1,
                    from include/linux/preempt.h:78,
                    from include/linux/percpu.h:6,
                    from include/linux/context_tracking_state.h:5,
                    from include/linux/hardirq.h:5,
                    from include/linux/kvm_host.h:7,
                    from arch/riscv/kvm/vcpu_timer.c:11:
   arch/riscv/kvm/vcpu_timer.c: In function 'kvm_riscv_vcpu_timer_restore':
>> arch/riscv/kvm/vcpu_timer.c:312:55: warning: right shift count >= width of type [-Wshift-count-overflow]
     312 |         csr_write(CSR_VSTIMECMPH, (u32)csr->vstimecmp >> 32);
         |                                                       ^~
   arch/riscv/include/asm/csr.h:283:45: note: in definition of macro 'csr_write'
     283 |         unsigned long __v = (unsigned long)(val);               \
         |                                             ^~~
   arch/riscv/kvm/vcpu_timer.c: In function 'kvm_riscv_vcpu_timer_save':
   arch/riscv/kvm/vcpu_timer.c:337:52: warning: right shift count >= width of type [-Wshift-count-overflow]
     337 |         csr->vstimecmp |= csr_read(CSR_VSTIMECMPH) >> 32;
         |                                                    ^~


vim +312 arch/riscv/kvm/vcpu_timer.c

   295	
   296	void kvm_riscv_vcpu_timer_restore(struct kvm_vcpu *vcpu)
   297	{
   298		struct kvm_vcpu_timer *vst;
   299		struct kvm_vcpu_csr *csr;
   300	
   301		kvm_riscv_vcpu_update_timedelta(vcpu);
   302	
   303		if (!cpu_sstc_ext_available)
   304			return;
   305	
   306		vst = &vcpu->arch.vstimer;
   307		csr = &vcpu->arch.guest_csr;
   308	#ifdef CONFIG_64BIT
   309		csr_write(CSR_VSTIMECMP, csr->vstimecmp);
   310	#else
   311		csr_write(CSR_VSTIMECMP, (u32)csr->vstimecmp);
 > 312		csr_write(CSR_VSTIMECMPH, (u32)csr->vstimecmp >> 32);
   313	#endif
   314	
   315		/* vstimer should be enabled for the remaining operations */
   316		if (unlikely(!vst->init_done))
   317			return;
   318	
   319		if (kvm_vcpu_is_blocking(vcpu))
   320			kvm_riscv_vcpu_timer_blocking(vcpu);
   321	}
   322	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

                 reply	other threads:[~2022-02-27  5:27 UTC|newest]

Thread overview: [no followups] expand[flat|nested]  mbox.gz  Atom feed

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=202202271321.biwCXG9G-lkp@intel.com \
    --to=lkp@intel.com \
    --cc=Atish.Patra@wdc.com \
    --cc=atishp@rivosinc.com \
    --cc=kbuild-all@lists.01.org \
    --cc=linux-kernel@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®