From: Corentin Labbe <clabbe@baylibre.com>
To: davem@davemloft.net, harsha.harsha@xilinx.com,
herbert@gondor.apana.org.au, kalyani.akula@xilinx.com,
michal.simek@xilinx.com
Cc: linux-arm-kernel@lists.infradead.org,
linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
Corentin Labbe <clabbe@baylibre.com>
Subject: [PATCH] crypto: xilinx: prevent probing on non-xilinx hardware
Date: Fri, 4 Mar 2022 07:36:48 +0000 [thread overview]
Message-ID: <20220304073648.972270-1-clabbe@baylibre.com> (raw)
The zynqmp-sha driver is always loaded and register its algorithm even on
platform which do not have the proper hardware.
This lead to a stacktrace due to zynqmp-sha3-384 failing its crypto
self tests.
So check if hardware is present via the firmware API call get_version.
While at it, simplify the platform_driver by using module_platform_driver()
Furthermore the driver should depend on ZYNQMP_FIRMWARE since it cannot
work without it.
Fixes: 7ecc3e34474b ("crypto: xilinx - Add Xilinx SHA3 driver")
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
drivers/crypto/Kconfig | 2 +-
drivers/crypto/xilinx/zynqmp-sha.c | 35 +++++++-----------------------
2 files changed, 9 insertions(+), 28 deletions(-)
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 51df3cd9934f..52bb632a91d5 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -822,7 +822,7 @@ config CRYPTO_DEV_ZYNQMP_AES
config CRYPTO_DEV_ZYNQMP_SHA3
bool "Support for Xilinx ZynqMP SHA3 hardware accelerator"
- depends on ARCH_ZYNQMP
+ depends on ZYNQMP_FIRMWARE
select CRYPTO_SHA3
help
Xilinx ZynqMP has SHA3 engine used for secure hash calculation.
diff --git a/drivers/crypto/xilinx/zynqmp-sha.c b/drivers/crypto/xilinx/zynqmp-sha.c
index 89549f4788ba..43ff170ff1c2 100644
--- a/drivers/crypto/xilinx/zynqmp-sha.c
+++ b/drivers/crypto/xilinx/zynqmp-sha.c
@@ -193,6 +193,13 @@ static int zynqmp_sha_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
int err;
+ u32 v;
+
+ /* Verify the hardware is present */
+ err = zynqmp_pm_get_api_version(&v);
+ if (err)
+ return err;
+
err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(ZYNQMP_DMA_BIT_MASK));
if (err < 0) {
@@ -251,33 +258,7 @@ static struct platform_driver zynqmp_sha_driver = {
},
};
-static int __init sha_driver_init(void)
-{
- struct platform_device *pdev;
- int ret;
-
- ret = platform_driver_register(&zynqmp_sha_driver);
- if (ret)
- return ret;
-
- pdev = platform_device_register_simple(zynqmp_sha_driver.driver.name,
- 0, NULL, 0);
- if (IS_ERR(pdev)) {
- ret = PTR_ERR(pdev);
- platform_driver_unregister(&zynqmp_sha_driver);
- pr_info("Failed to register ZynqMP SHA3 dvixe %d\n", ret);
- }
-
- return ret;
-}
-
-device_initcall(sha_driver_init);
-
-static void __exit sha_driver_exit(void)
-{
- platform_driver_unregister(&zynqmp_sha_driver);
-}
-
+module_platform_driver(zynqmp_sha_driver);
MODULE_DESCRIPTION("ZynqMP SHA3 hardware acceleration support.");
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Harsha <harsha.harsha@xilinx.com>");
--
2.34.1
next reply other threads:[~2022-03-04 7:37 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-04 7:36 Corentin Labbe [this message]
2022-03-09 3:22 ` Herbert Xu
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