From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79281C433F5 for ; Fri, 4 Mar 2022 15:08:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240125AbiCDPIw (ORCPT ); Fri, 4 Mar 2022 10:08:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240071AbiCDPIa (ORCPT ); Fri, 4 Mar 2022 10:08:30 -0500 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 348F045505; Fri, 4 Mar 2022 07:07:42 -0800 (PST) Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 2244w2hK013723; Fri, 4 Mar 2022 09:07:31 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=tTcpa7MzPHuc33bDZI9ZPTQ5F6Crr6js1OyCSzBY2bo=; b=Qlm6aRYec7UH8f5SY58AXm3ET/xiR7iqgpJoHUOh+1KGhIr4/OWc0pGARkLqdg4L674L kxDOhmwD5ueactTueA+KOKO9/TxMvajTKrB+WA81beOz4yL0oO2riKGgic68cCHKDM/i yy4gJYpxyixGmuCtBox/AAWUMd35k6GB6BHv4bL6DSVk6KvwVENzhQh5shAsawRys6dn DaSYhTxeIm89wNFBWsceYCzZvksuvo0AdLj7gHlOTpM2kDz+SNt85oqYxVKj7z/bToc0 1vhwo9RK2c4I+ZtODqiciiliFTnQ6HS56njlHtZWtmGv8UVIB5dBDgvxjIlU/+OX8Q3X 9g== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 3ek4j3h414-6 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Fri, 04 Mar 2022 09:07:30 -0600 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Fri, 4 Mar 2022 15:07:28 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.18 via Frontend Transport; Fri, 4 Mar 2022 15:07:28 +0000 Received: from aryzen.ad.cirrus.com (unknown [198.61.65.198]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 86A99B06; Fri, 4 Mar 2022 15:07:28 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure Subject: [PATCH v2 14/20] hda: cs35l41: Move boost config to initialization code Date: Fri, 4 Mar 2022 15:07:15 +0000 Message-ID: <20220304150721.3802-15-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220304150721.3802-1-tanureal@opensource.cirrus.com> References: <20220304150721.3802-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: kiYO3Hl6L6eTRRBsQqvG0-6RetYV7RAj X-Proofpoint-ORIG-GUID: kiYO3Hl6L6eTRRBsQqvG0-6RetYV7RAj X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Boost configuration doesn't need to be written for every new stream, so move it to the initialization code. Signed-off-by: Lucas Tanure --- include/sound/cs35l41.h | 1 + sound/pci/hda/cs35l41_hda.c | 13 ++++++++----- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/include/sound/cs35l41.h b/include/sound/cs35l41.h index fbf38f32e36d..a8537bccedcf 100644 --- a/include/sound/cs35l41.h +++ b/include/sound/cs35l41.h @@ -661,6 +661,7 @@ #define CS35L41_GLOBAL_EN_SHIFT 0 #define CS35L41_BST_EN_MASK 0x0030 #define CS35L41_BST_EN_SHIFT 4 +#define CS35L41_BST_DIS_FET_OFF 0x00 #define CS35L41_BST_EN_DEFAULT 0x2 #define CS35L41_AMP_EN_SHIFT 0 #define CS35L41_AMP_EN_MASK 1 diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index b3cc7db3fc42..3b8167d1ccc1 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -25,7 +25,6 @@ static const struct reg_sequence cs35l41_hda_config[] = { { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 { CS35L41_AMP_DIG_VOL_CTRL, 0x00000000 }, // AMP_VOL_PCM 0.0 dB { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB - { CS35L41_PWR_CTRL2, 0x00000001 }, // AMP_EN = 1 }; static const struct reg_sequence cs35l41_hda_mute[] = { @@ -34,7 +33,6 @@ static const struct reg_sequence cs35l41_hda_mute[] = { }; static const struct reg_sequence cs35l41_hda_start_bst[] = { - { CS35L41_PWR_CTRL2, 0x00000021 }, // BST_EN = 10, AMP_EN = 1 { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 }; @@ -94,7 +92,6 @@ static const struct reg_sequence cs35l41_active_to_safe[] = { { 0x00000040, 0x00000055 }, { 0x00000040, 0x000000AA }, { 0x00007438, 0x00585941 }, - { CS35L41_PWR_CTRL2, 0x00000000 }, // AMP_EN = 0 { CS35L41_PWR_CTRL1, 0x00000000 }, { 0x0000742C, 0x00000009, 2000 }, { 0x00007438, 0x00580941 }, @@ -144,6 +141,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) case HDA_GEN_PCM_ACT_OPEN: ret = regmap_multi_reg_write(reg, cs35l41_hda_config, ARRAY_SIZE(cs35l41_hda_config)); + regmap_update_bits(reg, CS35L41_PWR_CTRL2, + CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); break; case HDA_GEN_PCM_ACT_PREPARE: if (reg_seq->prepare) @@ -155,6 +154,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) ret = regmap_multi_reg_write(reg, reg_seq->cleanup, reg_seq->num_cleanup); break; case HDA_GEN_PCM_ACT_CLOSE: + regmap_update_bits(reg, CS35L41_PWR_CTRL2, + CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); if (reg_seq->close) ret = regmap_multi_reg_write(reg, reg_seq->close, reg_seq->num_close); break; @@ -232,8 +233,10 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; else cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst; - ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_reset_to_safe, - ARRAY_SIZE(cs35l41_reset_to_safe)); + regmap_multi_reg_write(cs35l41->regmap, cs35l41_reset_to_safe, + ARRAY_SIZE(cs35l41_reset_to_safe)); + ret = regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK, + CS35L41_BST_DIS_FET_OFF << CS35L41_BST_EN_SHIFT); if (ret) return ret; break; -- 2.35.1