From: James Clark <james.clark@arm.com>
To: suzuki.poulose@arm.com, coresight@lists.linaro.org,
mike.leach@linaro.org, anshuman.khandual@arm.com
Cc: mathieu.poirier@linaro.org, leo.yan@linaro.com,
James Clark <james.clark@arm.com>, Leo Yan <leo.yan@linaro.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v3 00/15] Make ETM register accesses consistent with sysreg.h
Date: Fri, 4 Mar 2022 17:18:57 +0000 [thread overview]
Message-ID: <20220304171913.2292458-1-james.clark@arm.com> (raw)
Changes since v2:
* Implement Mike's suggestion of not having _SHIFT and using the existing
FIELD_GET and FIELD_PREP methods.
* Dropped the change to add the new REG_VAL macro because of the above.
* FIELD_PREP could be used in some trivial cases, but in some cases the
shift is still required but can be calculated with __bf_shf
* Improved the commit messages.
* The change is still binary equivalent, but requires an extra step
mentioned at the end of this cover letter.
Applies to coresight/next 3619ee28488
Also available at https://gitlab.arm.com/linux-arm/linux-jc/-/tree/james-cs-register-refactor-v3
To check for binary equivalence follow the same steps in the cover letter
of v2, but apply the following change to coresight-priv.h. This is because
the existing version of the macros wrap the expression in a new scope {}
that flips something in the compiler:
#undef FIELD_GET
#define FIELD_GET(_mask, _reg) (((_reg) & (_mask)) >> __bf_shf(_mask))
#undef FIELD_PREP
#define FIELD_PREP(_mask, _val) (((_val) << __bf_shf(_mask)) & (_mask))
Thanks
James
James Clark (15):
coresight: etm4x: Cleanup TRCIDR0 register accesses
coresight: etm4x: Cleanup TRCIDR2 register accesses
coresight: etm4x: Cleanup TRCIDR3 register accesses
coresight: etm4x: Cleanup TRCIDR4 register accesses
coresight: etm4x: Cleanup TRCIDR5 register accesses
coresight: etm4x: Cleanup TRCCONFIGR register accesses
coresight: etm4x: Cleanup TRCEVENTCTL1R register accesses
coresight: etm4x: Cleanup TRCSTALLCTLR register accesses
coresight: etm4x: Cleanup TRCVICTLR register accesses
coresight: etm3x: Cleanup ETMTECR1 register accesses
coresight: etm4x: Cleanup TRCACATRn register accesses
coresight: etm4x: Cleanup TRCSSCCRn and TRCSSCSRn register accesses
coresight: etm4x: Cleanup TRCSSPCICRn register accesses
coresight: etm4x: Cleanup TRCBBCTLR register accesses
coresight: etm4x: Cleanup TRCRSCTLRn register accesses
.../coresight/coresight-etm3x-core.c | 2 +-
.../coresight/coresight-etm3x-sysfs.c | 2 +-
.../coresight/coresight-etm4x-core.c | 136 +++++--------
.../coresight/coresight-etm4x-sysfs.c | 180 +++++++++---------
drivers/hwtracing/coresight/coresight-etm4x.h | 122 ++++++++++--
5 files changed, 244 insertions(+), 198 deletions(-)
--
2.28.0
next reply other threads:[~2022-03-04 17:19 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-04 17:18 James Clark [this message]
2022-03-04 17:18 ` [PATCH v3 01/15] coresight: etm4x: Cleanup TRCIDR0 register accesses James Clark
2022-04-12 8:28 ` Mike Leach
2022-03-04 17:18 ` [PATCH v3 02/15] coresight: etm4x: Cleanup TRCIDR2 " James Clark
2022-04-12 8:30 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 03/15] coresight: etm4x: Cleanup TRCIDR3 " James Clark
2022-04-12 8:34 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 04/15] coresight: etm4x: Cleanup TRCIDR4 " James Clark
2022-04-12 8:37 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 05/15] coresight: etm4x: Cleanup TRCIDR5 " James Clark
2022-04-12 8:41 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 06/15] coresight: etm4x: Cleanup TRCCONFIGR " James Clark
2022-04-12 8:49 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 07/15] coresight: etm4x: Cleanup TRCEVENTCTL1R " James Clark
2022-04-12 9:09 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 08/15] coresight: etm4x: Cleanup TRCSTALLCTLR " James Clark
2022-04-12 9:18 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 09/15] coresight: etm4x: Cleanup TRCVICTLR " James Clark
2022-03-23 15:59 ` Mathieu Poirier
2022-03-28 10:41 ` James Clark
2022-04-12 10:15 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 10/15] coresight: etm3x: Cleanup ETMTECR1 " James Clark
2022-04-12 10:17 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 11/15] coresight: etm4x: Cleanup TRCACATRn " James Clark
2022-04-12 10:30 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 12/15] coresight: etm4x: Cleanup TRCSSCCRn and TRCSSCSRn " James Clark
2022-04-12 10:32 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 13/15] coresight: etm4x: Cleanup TRCSSPCICRn " James Clark
2022-04-12 10:39 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 14/15] coresight: etm4x: Cleanup TRCBBCTLR " James Clark
2022-04-12 10:41 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 15/15] coresight: etm4x: Cleanup TRCRSCTLRn " James Clark
2022-03-23 16:15 ` Mathieu Poirier
2022-04-12 10:42 ` Mike Leach
2022-03-23 16:22 ` [PATCH v3 00/15] Make ETM register accesses consistent with sysreg.h Mathieu Poirier
2022-03-28 10:41 ` James Clark
2022-04-13 17:08 ` Mathieu Poirier
2022-04-14 8:57 ` James Clark
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220304171913.2292458-1-james.clark@arm.com \
--to=james.clark@arm.com \
--cc=anshuman.khandual@arm.com \
--cc=coresight@lists.linaro.org \
--cc=leo.yan@linaro.com \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mathieu.poirier@linaro.org \
--cc=mike.leach@linaro.org \
--cc=suzuki.poulose@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®