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Signed-off-by: Jacky Huang --- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/nuvoton/Makefile | 2 + arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts | 23 +++++ arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 106 +++++++++++++++++++++ 4 files changed, 132 insertions(+) create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index 639e01a4d855..28e01442094f 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -30,3 +30,4 @@ subdir-y +=3D synaptics subdir-y +=3D ti subdir-y +=3D toshiba subdir-y +=3D xilinx +subdir-y +=3D nuvoton diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuv= oton/Makefile new file mode 100644 index 000000000000..e1e0c466bf5e --- /dev/null +++ b/arch/arm64/boot/dts/nuvoton/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_NUVOTON) +=3D ma35d1-evb.dtb diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts b/arch/arm64/boot/d= ts/nuvoton/ma35d1-evb.dts new file mode 100644 index 000000000000..38e4f734da0f --- /dev/null +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Source for MA35D1 Evaluation Board (EVB) + * + * Copyright (C) 2021 Nuvoton Technology Corp. + */ + +/dts-v1/; +#include "ma35d1.dtsi" + +/ { + model =3D "Nuvoton MA35D1-EVB"; + + chosen { + bootargs =3D "console=3DttyS0,115200n8"; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x00000000 0x80000000 0 0x10000000>; + }; +}; + diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/= nuvoton/ma35d1.dtsi new file mode 100644 index 000000000000..27adac4975c3 --- /dev/null +++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Nuvoton Technology Corp. + */ + +#include +#include +#include +#include + +/ { + compatible =3D "nuvoton,ma35d1"; + interrupt-parent =3D <&gic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu0>; + }; + core1 { + cpu =3D <&cpu1>; + }; + }; + }; + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a35"; + reg =3D <0x0 0x0>; + enable-method =3D "psci"; + next-level-cache =3D <&L2_0>; + }; + cpu1: cpu@1 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a35"; + reg =3D <0x0 0x1>; + enable-method =3D "psci"; + next-level-cache =3D <&L2_0>; + }; + L2_0: l2-cache0 { + compatible =3D "cache"; + cache-level =3D <2>; + }; + }; + + psci { + compatible =3D "arm,psci-0.2"; + method =3D "smc"; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + clock-frequency =3D <12000000>; + }; + + sys: system-controller@40460000 { + compatible =3D "nuvoton,ma35d1-sys", "syscon", "simple-mfd"= ; + reg =3D <0x0 0x40460000 0x0 0x200>; + }; + + reset: reset-controller { + compatible =3D "nuvoton,ma35d1-reset"; + nuvoton,ma35d1-sys =3D <&sys>; + #reset-cells =3D <1>; + }; + + clk: clock-controller@40460200 { + compatible =3D "nuvoton,ma35d1-clk"; + reg =3D <0x00000000 0x40460200 0x0 0x100>; + #clock-cells =3D <1>; + assigned-clocks =3D <&clk DDRPLL>, + <&clk APLL>, + <&clk EPLL>, + <&clk VPLL>; + assigned-clock-rates =3D <266000000>, + <180000000>, + <500000000>, + <102000000>; + clock-pll-mode =3D <1>, <0>, <0>, <0>; + }; + + gic: interrupt-controller@50800000 { + compatible =3D "arm,gic-400"; + #interrupt-cells =3D <3>; + interrupt-parent =3D <&gic>; + interrupt-controller; + reg =3D <0x0 0x50801000 0 0x1000>, + <0x0 0x50802000 0 0x2000>, + <0x0 0x50804000 0 0x2000>, + <0x0 0x50806000 0 0x2000>; + interrupts =3D ; + }; +}; -- 2.17.1 ________________________________ ________________________________ The privileged confidential information contained in this email is intende= d for use only by the addressees as indicated by the original sender of thi= s email. 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