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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?nlru/JG3pMJUV4gpRUr+5DkwW+74VjF8qeJalO/MO2ZZO7Vex+B2C2T/Pfzs?= =?us-ascii?Q?HVRXeoAPYz1TWubKlWyX1r2ZBjsg6idMzQhIXJ3jRNytHEoeuqrnMlGd6Vi9?= =?us-ascii?Q?GV7l98X9io7ogwGVUBlX5iz9dlGupi5R5bms6byYqxRkhO54yRbW6hPXYsXp?= =?us-ascii?Q?ug3zv1Dk82roC9qCIpNLqNCQ0clBJjO1v+3UEbQ07hLyPD8Ne6Vl1o1WY1U8?= =?us-ascii?Q?yE8f2WGyYzNpG7Wx70sSFam6aiI7q0YVlXmJkaifadld/ievrjL1XouFX5Pq?= =?us-ascii?Q?djdUc0SXCItJLERn2zN6QDT4aonDvTFOpTH965DF9J8bpQUFlMd65Yzy/L8z?= =?us-ascii?Q?Emfiwg8SMXrb4unvPDRv4/l2J7+acp2A+Rsx3l+G3QNc9syrnVHJDVFm5Wp+?= =?us-ascii?Q?MybdkXMz+JrKTIS5COCQ5ZMkEvldwOw1r1b/iQMdSAal37G1Lzk9R9QdSgJT?= =?us-ascii?Q?jiMTJK/3B1TxJrVbvK0WtzLKvTeqO9AKJyCJXLMDK+yf+W1u8X+HK1PcSWUZ?= =?us-ascii?Q?hg2zUQ7tne1Dy+kt18hus1KEILVh74ENx+6KbwaYydGxbDMJjvFhukLljCiG?= =?us-ascii?Q?ilYlSPXrzuL7A4zBuQ0swkjDS/+PLnLFkK2wELxFZBIG67dLncSBdyU4TIja?= =?us-ascii?Q?Qj+FClN6KMms1IAGCZs0TU0lP3V6/LCi4M9gFzZsoWZzPRs4hgJTaM9r4+1w?= =?us-ascii?Q?R/eqK0qFSh6i9oN5yZzzu0t8s97Sk8j9V2N8fDu8J07RPR7xD8djwV3TryCK?= =?us-ascii?Q?GXNimA9FlCWU2uNNgzBLSSHloA3T2pLwZCZU79uCdFF8FH8/n538kd3uBAxL?= =?us-ascii?Q?XkIjfo/+sjwUGAfvaOiP+kyBGBG+XVnnUL1Hmyv1ALZqjRat8vf1M5WpE8PZ?= =?us-ascii?Q?C+5D9GmyYuaqlBuEol9VLcc77TpZvwX1U3o9B4obaOGcBRv6pFLYxsMZMNrQ?= =?us-ascii?Q?LvOvLw+SyP6PPhOA4JD9L0vFd67QZJjSP4Mu0ZW3RVHO1mqhSZP9/mlms5fo?= =?us-ascii?Q?uHwFPB7pUEBulRu7PRJL7dEC2lxs3+VfSylOfikODqSTb8nRVFiXNeLfGNUe?= =?us-ascii?Q?ARygtQr6a3+tn5YGjat1FayBqdcBVGAmdfT41IwJBSOFKYoc3g/aETLe3lb/?= =?us-ascii?Q?NZUWFewl3bgwAVQfsd3QKtEGd/Ha65ers13O79MRXZgK9WsuXZ3HJXurq+dQ?= =?us-ascii?Q?pdix1GTTxjdBOwuGEIDhVAcr9EIdQ4Uq6U7HHX+SiITga/7DPn7NJ5UJ884Z?= =?us-ascii?Q?Vi7X63WMjpnRs419xYitx5dodEGyNrJ1D5ValI/XLAGodFtVBKRO0T8ja5ip?= =?us-ascii?Q?ozoEunRvvv2cQdef0/LNkjMlbELVCz+t/bX/LBQXRaGtohfITf3lhoOX81F7?= =?us-ascii?Q?cJkCZj9uE2TRD3oL9W6YaqePaPlcfHaVVVLmNNvq3Rl5iWPizfLCEe9LZKmW?= =?us-ascii?Q?c2/ywQJey80rMzkKxDJoU73HZAN1gIeuE7JIXEfxHKny7yP4p/cp3qMq/gar?= =?us-ascii?Q?+UW7sDd1hS6PYRuJvHHh9mO7+f8UyB80/5FyTsurmOn3oUNP1F4BSczLJMdt?= =?us-ascii?Q?mOE91y4vt2CXQTz0IyR9gYmFAsg8ykqXxBGyN4aHeLJ3ngmgElxhx8OrnuYI?= =?us-ascii?Q?+PkXTqGIG1vjTFhfSiA3kxw=3D?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a3cdd6ab-7f09-48dd-f5a3-08da01b3e174 X-MS-Exchange-CrossTenant-AuthSource: DU0PR04MB9417.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Mar 2022 10:02:12.1377 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qaEU2I02mY4EJXl0skzTZfGzOvsfVU31ulpU1J8GY/j0kRZUFLLrEqum2w389guH5WeuuD9cadDWwcpwQeqApA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB7363 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peng Fan i.MX93 S401 MU support two interrupts: tx empty and rx full. - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case - Update Copyright Signed-off-by: Peng Fan --- drivers/mailbox/imx-mailbox.c | 45 +++++++++++++++++++++++------------ 1 file changed, 30 insertions(+), 15 deletions(-) diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c index 03699843a6fd..24977d66bfb9 100644 --- a/drivers/mailbox/imx-mailbox.c +++ b/drivers/mailbox/imx-mailbox.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2018 Pengutronix, Oleksij Rempel + * Copyright 2022 NXP, Peng Fan */ #include @@ -28,11 +29,12 @@ #define IMX_MU_SECO_TX_TOUT (msecs_to_jiffies(3000)) #define IMX_MU_SECO_RX_TOUT (msecs_to_jiffies(3000)) +/* Please not change TX & RX */ enum imx_mu_chan_type { - IMX_MU_TYPE_TX, /* Tx */ - IMX_MU_TYPE_RX, /* Rx */ - IMX_MU_TYPE_TXDB, /* Tx doorbell */ - IMX_MU_TYPE_RXDB, /* Rx doorbell */ + IMX_MU_TYPE_TX = 0, /* Tx */ + IMX_MU_TYPE_RX = 1, /* Rx */ + IMX_MU_TYPE_TXDB = 2, /* Tx doorbell */ + IMX_MU_TYPE_RXDB = 3, /* Rx doorbell */ }; enum imx_mu_xcr { @@ -92,6 +94,7 @@ enum imx_mu_type { IMX_MU_V1, IMX_MU_V2 = BIT(1), IMX_MU_V2_S4 = BIT(15), + IMX_MU_V2_IRQ = BIT(16), }; struct imx_mu_dcfg { @@ -536,7 +539,7 @@ static int imx_mu_startup(struct mbox_chan *chan) { struct imx_mu_priv *priv = to_imx_mu_priv(chan->mbox); struct imx_mu_con_priv *cp = chan->con_priv; - unsigned long irq_flag = IRQF_SHARED; + unsigned long irq_flag = 0; int ret; pm_runtime_get_sync(priv->dev); @@ -551,11 +554,12 @@ static int imx_mu_startup(struct mbox_chan *chan) if (!priv->dev->pm_domain) irq_flag |= IRQF_NO_SUSPEND; - ret = request_irq(priv->irq[0], imx_mu_isr, irq_flag, - cp->irq_desc, chan); + if (!(priv->dcfg->type & IMX_MU_V2_IRQ)) + irq_flag |= IRQF_SHARED; + + ret = request_irq(priv->irq[cp->type], imx_mu_isr, irq_flag, cp->irq_desc, chan); if (ret) { - dev_err(priv->dev, - "Unable to acquire IRQ %d\n", priv->irq[0]); + dev_err(priv->dev, "Unable to acquire IRQ %d\n", priv->irq[cp->type]); return ret; } @@ -598,7 +602,7 @@ static void imx_mu_shutdown(struct mbox_chan *chan) break; } - free_irq(priv->irq[0], chan); + free_irq(priv->irq[cp->type], chan); pm_runtime_put_sync(priv->dev); } @@ -749,7 +753,7 @@ static int imx_mu_probe(struct platform_device *pdev) struct device_node *np = dev->of_node; struct imx_mu_priv *priv; const struct imx_mu_dcfg *dcfg; - int ret; + int i, ret; u32 size; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); @@ -762,14 +766,25 @@ static int imx_mu_probe(struct platform_device *pdev) if (IS_ERR(priv->base)) return PTR_ERR(priv->base); - priv->irq[0] = platform_get_irq(pdev, 0); - if (priv->irq[0] < 0) - return priv->irq[0]; - dcfg = of_device_get_match_data(dev); if (!dcfg) return -EINVAL; priv->dcfg = dcfg; + if (priv->dcfg->type & IMX_MU_V2_IRQ) { + priv->irq[IMX_MU_TYPE_TX] = platform_get_irq_byname(pdev, "tx"); + if (priv->irq[IMX_MU_TYPE_TX] < 0) + return priv->irq[IMX_MU_TYPE_TX]; + priv->irq[IMX_MU_TYPE_RX] = platform_get_irq_byname(pdev, "rx"); + if (priv->irq[IMX_MU_TYPE_RX] < 0) + return priv->irq[IMX_MU_TYPE_RX]; + } else { + ret = platform_get_irq(pdev, 0); + if (ret < 0) + return ret; + + for (i = 0; i < IMX_MU_CHANS; i++) + priv->irq[i] = ret; + } if (priv->dcfg->type & IMX_MU_V2_S4) size = sizeof(struct imx_s4_rpc_msg_max); -- 2.25.1