From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76560C433F5 for ; Fri, 11 Mar 2022 03:58:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346163AbiCKD7E (ORCPT ); Thu, 10 Mar 2022 22:59:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346149AbiCKD7B (ORCPT ); Thu, 10 Mar 2022 22:59:01 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B20EA7746 for ; Thu, 10 Mar 2022 19:57:51 -0800 (PST) X-UUID: 2e3d5d31846a4dd495aea231f9835e5b-20220311 X-UUID: 2e3d5d31846a4dd495aea231f9835e5b-20220311 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1802190452; Fri, 11 Mar 2022 11:57:48 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 11 Mar 2022 11:57:47 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 11 Mar 2022 11:57:47 +0800 From: Miles Chen To: CC: , , , , , , , , Subject: Re: [PATCH v1] soc: mediatek: pm-domains: Fix the power glitch issue Date: Fri, 11 Mar 2022 11:57:47 +0800 Message-ID: <20220311035747.20551-1-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <3a55f44998645308bb1b4fd65ef550682ebe6ba0.camel@mediatek.com> References: <3a55f44998645308bb1b4fd65ef550682ebe6ba0.camel@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Chun-Jie, > Hi Miles, > > This control sequence is suggested by hardware designer, > and when PWR_RST_B from 0 -> 1, it will trigger to exit from reset > state to running state, if we still enable isolation then can't start > running normally, so we need to disable isolation first in power on > sequence. > Thanks for your explanation. Reviewed-by: Miles Chen Thanks, Miles