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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Mar 2022 17:28:47.9173 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d8f3e3d0-47c8-44d0-39fd-08da10e06afe X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT037.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1884 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Based on feedback from Robin on the initial AMD IOMMU documentation, fix up the Intel documentation to clarify IOMMU vs device and modern DMA API. Signed-off-by: Alex Deucher --- V2: Fix spelling error in commit message Rework ACPI section as suggested by Dave Hansen Documentation/x86/intel-iommu.rst | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/Documentation/x86/intel-iommu.rst b/Documentation/x86/intel-iommu.rst index 4d3391c7bd3f..17d8497e506b 100644 --- a/Documentation/x86/intel-iommu.rst +++ b/Documentation/x86/intel-iommu.rst @@ -19,9 +19,8 @@ Some Keywords Basic stuff ----------- -ACPI enumerates and lists the different DMA engines in the platform, and -device scope relationships between PCI devices and which DMA engine controls -them. +ACPI enumerates both the IOMMUs in the platform and which IOMMU +controls a specific PCI device. What is RMRR? ------------- @@ -36,9 +35,9 @@ unity mappings for these regions for these devices to access these regions. How is IOVA generated? ---------------------- -Well behaved drivers call pci_map_*() calls before sending command to device +Well behaved drivers call dma_map_*() calls before sending command to device that needs to perform DMA. Once DMA is completed and mapping is no longer -required, device performs a pci_unmap_*() calls to unmap the region. +required, device performs a dma_unmap_*() calls to unmap the region. The Intel IOMMU driver allocates a virtual address per domain. Each PCIE device has its own domain (hence protection). Devices under p2p bridges @@ -68,7 +67,7 @@ address from PCI MMIO ranges so they are not allocated for IOVA addresses. Fault reporting --------------- -When errors are reported, the DMA engine signals via an interrupt. The fault +When errors are reported, the IOMMU signals via an interrupt. The fault reason and device that caused it with fault reason is printed on console. See below for sample. -- 2.35.1