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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT066.mail.protection.outlook.com (10.13.175.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5186.14 via Frontend Transport; Wed, 20 Apr 2022 15:50:16 +0000 Received: from sp5-759chost.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Wed, 20 Apr 2022 10:50:13 -0500 From: Suravee Suthikulpanit To: , CC: , , , , , , , Suravee Suthikulpanit Subject: [PATCH V2 0/2] KVM: SVM: Optimize AVIC incomplete IPI #vmexit handling Date: Wed, 20 Apr 2022 10:49:52 -0500 Message-ID: <20220420154954.19305-1-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d945a9aa-1a22-49f5-e51d-08da22e5775b X-MS-TrafficTypeDiagnostic: BY5PR12MB4869:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Apr 2022 15:50:16.9994 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d945a9aa-1a22-49f5-e51d-08da22e5775b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT066.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4869 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series introduce a fast-path when handling AVIC incomplete IPI #vmexit for AVIC, and introduce a new tracepoint for the slow-path processing. Regards, Suravee Change from v1: (https://lore.kernel.org/lkml/20220414051151.77710-1-suravee.suthikulpanit@amd.com/T/) * Rebased on top of Linux 5.18-rc3 * Patch 1/2: - Update commit shortlog to be more meaningful - Refactor to remove x2AVIC related logic for now, which will be included in the x2AVIC patch series. Suravee Suthikulpanit (2): KVM: SVM: Use target APIC ID to complete AVIC IRQs when possible KVM: SVM: Introduce trace point for the slow-path of avic_kic_target_vcpus arch/x86/kvm/svm/avic.c | 74 ++++++++++++++++++++++++++++++++++++++--- arch/x86/kvm/trace.h | 20 +++++++++++ arch/x86/kvm/x86.c | 1 + 3 files changed, 91 insertions(+), 4 deletions(-) -- 2.25.1