From: kernel test robot <lkp@intel.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: kbuild-all@lists.01.org, linux-kernel@vger.kernel.org,
Thierry Reding <treding@nvidia.com>,
Krzysztof Kozlowski <krzk@kernel.org>
Subject: drivers/memory/tegra/mc.c:320:7: warning: Local variable 'value' shadows outer variable [shadowVariable]
Date: Thu, 21 Apr 2022 14:31:57 +0800 [thread overview]
Message-ID: <202204201809.s6rWhuwc-lkp@intel.com> (raw)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 559089e0a93d44280ec3ab478830af319c56dbe3
commit: 56ebc9b0d77e0406aba2d900c82e79204cc7dc32 memory: tegra: Enable compile testing for all drivers
date: 11 months ago
compiler: arc-elf-gcc (GCC) 11.2.0
reproduce (cppcheck warning):
# apt-get install cppcheck
git checkout 56ebc9b0d77e0406aba2d900c82e79204cc7dc32
cppcheck --quiet --enable=style,performance,portability --template=gcc FILE
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
cppcheck warnings: (new ones prefixed by >>)
>> drivers/memory/tegra/mc.c:320:7: warning: Local variable 'value' shadows outer variable [shadowVariable]
u32 value;
^
drivers/memory/tegra/mc.c:306:6: note: Shadowed declaration
u32 value;
^
drivers/memory/tegra/mc.c:320:7: note: Shadow variable
u32 value;
^
vim +/value +320 drivers/memory/tegra/mc.c
20e92462cdfb27 Dmitry Osipenko 2018-04-13 301
89184651631713 Thierry Reding 2014-04-16 302 static int tegra_mc_setup_latency_allowance(struct tegra_mc *mc)
89184651631713 Thierry Reding 2014-04-16 303 {
89184651631713 Thierry Reding 2014-04-16 304 unsigned long long tick;
89184651631713 Thierry Reding 2014-04-16 305 unsigned int i;
89184651631713 Thierry Reding 2014-04-16 306 u32 value;
89184651631713 Thierry Reding 2014-04-16 307
89184651631713 Thierry Reding 2014-04-16 308 /* compute the number of MC clock cycles per tick */
b906c056b6023c Dmitry Osipenko 2019-04-12 309 tick = (unsigned long long)mc->tick * clk_get_rate(mc->clk);
89184651631713 Thierry Reding 2014-04-16 310 do_div(tick, NSEC_PER_SEC);
89184651631713 Thierry Reding 2014-04-16 311
48791f97223430 Dmitry Osipenko 2019-04-12 312 value = mc_readl(mc, MC_EMEM_ARB_CFG);
89184651631713 Thierry Reding 2014-04-16 313 value &= ~MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE_MASK;
89184651631713 Thierry Reding 2014-04-16 314 value |= MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE(tick);
48791f97223430 Dmitry Osipenko 2019-04-12 315 mc_writel(mc, value, MC_EMEM_ARB_CFG);
89184651631713 Thierry Reding 2014-04-16 316
89184651631713 Thierry Reding 2014-04-16 317 /* write latency allowance defaults */
89184651631713 Thierry Reding 2014-04-16 318 for (i = 0; i < mc->soc->num_clients; i++) {
89184651631713 Thierry Reding 2014-04-16 319 const struct tegra_mc_la *la = &mc->soc->clients[i].la;
89184651631713 Thierry Reding 2014-04-16 @320 u32 value;
89184651631713 Thierry Reding 2014-04-16 321
48791f97223430 Dmitry Osipenko 2019-04-12 322 value = mc_readl(mc, la->reg);
89184651631713 Thierry Reding 2014-04-16 323 value &= ~(la->mask << la->shift);
89184651631713 Thierry Reding 2014-04-16 324 value |= (la->def & la->mask) << la->shift;
48791f97223430 Dmitry Osipenko 2019-04-12 325 mc_writel(mc, value, la->reg);
89184651631713 Thierry Reding 2014-04-16 326 }
89184651631713 Thierry Reding 2014-04-16 327
76b959a44c0b9c Dmitry Osipenko 2019-04-12 328 /* latch new values */
48791f97223430 Dmitry Osipenko 2019-04-12 329 mc_writel(mc, MC_TIMING_UPDATE, MC_TIMING_CONTROL);
76b959a44c0b9c Dmitry Osipenko 2019-04-12 330
89184651631713 Thierry Reding 2014-04-16 331 return 0;
89184651631713 Thierry Reding 2014-04-16 332 }
89184651631713 Thierry Reding 2014-04-16 333
:::::: The code at line 320 was first introduced by commit
:::::: 8918465163171322c77a19d5258a95f56d89d2e4 memory: Add NVIDIA Tegra memory controller support
:::::: TO: Thierry Reding <treding@nvidia.com>
:::::: CC: Thierry Reding <treding@nvidia.com>
--
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