From: kernel test robot <lkp@intel.com>
To: Ingo Molnar <mingo@kernel.org>
Cc: kbuild-all@lists.01.org, linux-kernel@vger.kernel.org
Subject: [mingo-tip:sched/headers 1632/2579] drivers/gpu/drm/i915/gt/intel_lrc.h:96:49: error: implicit declaration of function 'GENMASK'
Date: Fri, 22 Apr 2022 16:46:13 +0800 [thread overview]
Message-ID: <202204221638.zaC4nU9r-lkp@intel.com> (raw)
tree: git://git.kernel.org/pub/scm/linux/kernel/git/mingo/tip.git sched/headers
head: 49e1ec6c70a6eb4b7de9250a455b8b63eb42afbe
commit: 1486cbbdf88b0bede470bd74183443b6d29bf637 [1632/2579] headers/deps: Optimize <linux/kernel.h>
config: x86_64-randconfig-c002 (https://download.01.org/0day-ci/archive/20220422/202204221638.zaC4nU9r-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.2.0-20) 11.2.0
reproduce (this is a W=1 build):
# https://git.kernel.org/pub/scm/linux/kernel/git/mingo/tip.git/commit/?id=1486cbbdf88b0bede470bd74183443b6d29bf637
git remote add mingo-tip git://git.kernel.org/pub/scm/linux/kernel/git/mingo/tip.git
git fetch --no-tags mingo-tip sched/headers
git checkout 1486cbbdf88b0bede470bd74183443b6d29bf637
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from <command-line>:
drivers/gpu/drm/i915/gt/intel_lrc.h: In function 'lrc_desc_priority':
>> drivers/gpu/drm/i915/gt/intel_lrc.h:96:49: error: implicit declaration of function 'GENMASK' [-Werror=implicit-function-declaration]
96 | #define GEN12_CTX_PRIORITY_MASK GENMASK(10, 9)
| ^~~~~~~
include/linux/compiler_types.h:332:23: note: in definition of macro '__compiletime_assert'
332 | if (!(condition)) \
| ^~~~~~~~~
include/linux/compiler_types.h:352:9: note: in expansion of macro '_compiletime_assert'
352 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:65:17: note: in expansion of macro 'BUILD_BUG_ON_MSG'
65 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:114:17: note: in expansion of macro '__BF_FIELD_CHECK'
114 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_lrc.h:97:49: note: in expansion of macro 'FIELD_PREP'
97 | #define GEN12_CTX_PRIORITY_HIGH FIELD_PREP(GEN12_CTX_PRIORITY_MASK, 2)
| ^~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_lrc.h:97:60: note: in expansion of macro 'GEN12_CTX_PRIORITY_MASK'
97 | #define GEN12_CTX_PRIORITY_HIGH FIELD_PREP(GEN12_CTX_PRIORITY_MASK, 2)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_lrc.h:116:24: note: in expansion of macro 'GEN12_CTX_PRIORITY_HIGH'
116 | return GEN12_CTX_PRIORITY_HIGH;
| ^~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
vim +/GENMASK +96 drivers/gpu/drm/i915/gt/intel_lrc.h
f4c1fdb93992ff Matt Roper 2022-03-01 88
f4c1fdb93992ff Matt Roper 2022-03-01 89 #define CTX_GTT_ADDRESS_MASK GENMASK(31, 12)
f4c1fdb93992ff Matt Roper 2022-03-01 90 #define GEN8_CTX_VALID (1 << 0)
f4c1fdb93992ff Matt Roper 2022-03-01 91 #define GEN8_CTX_FORCE_PD_RESTORE (1 << 1)
f4c1fdb93992ff Matt Roper 2022-03-01 92 #define GEN8_CTX_FORCE_RESTORE (1 << 2)
f4c1fdb93992ff Matt Roper 2022-03-01 93 #define GEN8_CTX_L3LLC_COHERENT (1 << 5)
f4c1fdb93992ff Matt Roper 2022-03-01 94 #define GEN8_CTX_PRIVILEGE (1 << 8)
f4c1fdb93992ff Matt Roper 2022-03-01 95 #define GEN8_CTX_ADDRESSING_MODE_SHIFT 3
adfadb5638bf32 Matt Roper 2022-03-01 @96 #define GEN12_CTX_PRIORITY_MASK GENMASK(10, 9)
adfadb5638bf32 Matt Roper 2022-03-01 97 #define GEN12_CTX_PRIORITY_HIGH FIELD_PREP(GEN12_CTX_PRIORITY_MASK, 2)
adfadb5638bf32 Matt Roper 2022-03-01 98 #define GEN12_CTX_PRIORITY_NORMAL FIELD_PREP(GEN12_CTX_PRIORITY_MASK, 1)
adfadb5638bf32 Matt Roper 2022-03-01 99 #define GEN12_CTX_PRIORITY_LOW FIELD_PREP(GEN12_CTX_PRIORITY_MASK, 0)
f4c1fdb93992ff Matt Roper 2022-03-01 100 #define GEN8_CTX_ID_SHIFT 32
f4c1fdb93992ff Matt Roper 2022-03-01 101 #define GEN8_CTX_ID_WIDTH 21
f4c1fdb93992ff Matt Roper 2022-03-01 102 #define GEN11_SW_CTX_ID_SHIFT 37
f4c1fdb93992ff Matt Roper 2022-03-01 103 #define GEN11_SW_CTX_ID_WIDTH 11
f4c1fdb93992ff Matt Roper 2022-03-01 104 #define GEN11_ENGINE_CLASS_SHIFT 61
f4c1fdb93992ff Matt Roper 2022-03-01 105 #define GEN11_ENGINE_CLASS_WIDTH 3
f4c1fdb93992ff Matt Roper 2022-03-01 106 #define GEN11_ENGINE_INSTANCE_SHIFT 48
f4c1fdb93992ff Matt Roper 2022-03-01 107 #define GEN11_ENGINE_INSTANCE_WIDTH 6
f4c1fdb93992ff Matt Roper 2022-03-01 108 #define XEHP_SW_CTX_ID_SHIFT 39
f4c1fdb93992ff Matt Roper 2022-03-01 109 #define XEHP_SW_CTX_ID_WIDTH 16
f4c1fdb93992ff Matt Roper 2022-03-01 110 #define XEHP_SW_COUNTER_SHIFT 58
f4c1fdb93992ff Matt Roper 2022-03-01 111 #define XEHP_SW_COUNTER_WIDTH 6
f4c1fdb93992ff Matt Roper 2022-03-01 112
:::::: The code at line 96 was first introduced by commit
:::::: adfadb5638bf32e97326ec05ae379be561e13677 drm/i915/xehp: Define context scheduling attributes in lrc descriptor
:::::: TO: Matt Roper <matthew.d.roper@intel.com>
:::::: CC: Matt Roper <matthew.d.roper@intel.com>
--
0-DAY CI Kernel Test Service
https://01.org/lkp
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