From: kernel test robot <lkp@intel.com>
To: Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: llvm@lists.linux.dev, kbuild-all@lists.01.org,
linux-kernel@vger.kernel.org,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Subject: [drm-msm:msm-next-staging 56/96] drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c:273:2: warning: unannotated fall-through between switch labels
Date: Mon, 2 May 2022 13:19:55 +0800 [thread overview]
Message-ID: <202205021302.tnSsOIBN-lkp@intel.com> (raw)
tree: https://gitlab.freedesktop.org/drm/msm.git msm-next-staging
head: f1fc2b87de4719cfa8e193e0746cc524dd9f7472
commit: 6d084806c8c107dc0b652d6792c7aea9b6b0d66f [56/96] drm/msm/dpu: add changes to support writeback in hw_ctl
config: arm64-allyesconfig (https://download.01.org/0day-ci/archive/20220502/202205021302.tnSsOIBN-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 09325d36061e42b495d1f4c7e933e260eac260ed)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
git remote add drm-msm https://gitlab.freedesktop.org/drm/msm.git
git fetch --no-tags drm-msm msm-next-staging
git checkout 6d084806c8c107dc0b652d6792c7aea9b6b0d66f
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/dma/ti/ drivers/gpu/drm/msm/ drivers/pci/controller/dwc/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c:273:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
default:
^
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c:273:2: note: insert 'break;' to avoid fall-through
default:
^
break;
1 warning generated.
vim +273 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
264
265 static void dpu_hw_ctl_update_pending_flush_wb(struct dpu_hw_ctl *ctx,
266 enum dpu_wb wb)
267 {
268 switch (wb) {
269 case WB_0:
270 case WB_1:
271 case WB_2:
272 ctx->pending_flush_mask |= BIT(WB_IDX);
> 273 default:
274 break;
275 }
276 }
277
--
0-DAY CI Kernel Test Service
https://01.org/lkp
reply other threads:[~2022-05-02 5:20 UTC|newest]
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