From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 336BEC433F5 for ; Fri, 6 May 2022 09:38:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1390539AbiEFJme (ORCPT ); Fri, 6 May 2022 05:42:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235627AbiEFJmb (ORCPT ); Fri, 6 May 2022 05:42:31 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B4FD606D4; Fri, 6 May 2022 02:38:49 -0700 (PDT) X-UUID: 679c0d3032cf45cfbbe1871be809c4dc-20220506 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4,REQID:9ff80315-36b9-4ca1-858d-c571d77a9f0a,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:-20,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,A CTION:release,TS:75 X-CID-INFO: VERSION:1.1.4,REQID:9ff80315-36b9-4ca1-858d-c571d77a9f0a,OB:0,LOB: 0,IP:0,URL:0,TC:0,Content:-20,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,A CTION:quarantine,TS:75 X-CID-META: VersionHash:faefae9,CLOUDID:c48ed4b2-56b5-4c9e-8d83-0070b288eb6a,C OID:7ad42ea8f6a0,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,File:nil ,QS:0,BEC:nil X-UUID: 679c0d3032cf45cfbbe1871be809c4dc-20220506 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 663738102; Fri, 06 May 2022 17:38:45 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 6 May 2022 17:38:44 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 6 May 2022 17:38:44 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Fri, 6 May 2022 17:38:44 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , "Chen-Yu Tsai" , Ryder Lee , , Allen-KH Cheng Subject: [PATCH v9 0/4] Add basic node support for MediaTek MT8186 SoC Date: Fri, 6 May 2022 17:38:39 +0800 Message-ID: <20220506093843.29030-1-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MT8186 is a SoC based on 64bit ARMv8 architecture. It contains 6 CA55 and 2 CA78 cores. MT8186 share many HW IP with MT65xx series. This patchset was tested on MT8186 evaluation board to shell. Based on matthias/, v5.18-next/dts64. and add the below PATCHs - dt-bindings: ARM: MediaTek: Add new document bindings of MT8186 clock from f113a51aa2cfbd22c376d8722b5c9fef469be162 in kernel/git/clk/linux.git, clk-next - dt-bindings: watchdog: Add compatible for MediaTek MT8186 from ec41c6d93df6ab625140611caf7bea7e1916ae9b in kernel/git/groeck/linux-staging.git, watchdog-next - dt-bindings: reset: mt8186: add reset-controller header file from 78915fdfae188e23bd68d19a0f7fe7d87db57e9a in kernel/git/groeck/linux-staging.git, watchdog-next changes since v8: - change name from pins_bus to pins-sda-scl - correct email address - add capacity-dmips-mhz for each CPU - add ppi-partitions in gic node - change name to power-domain - remove status "okay" in scp node - update timer and pericfg compatible in series changes since v7: - add scp&auxadc node changes since v6: - remove unnecessary blank line changes since v5: - replace Mediatek a to MediaTek - use GPL-2.0-only OR BSD-2-Clause changes since v4: - correct driver clock of mt8186 - add power domains controller and clock controllers - add pinctrl, usb host, spi and i2c nodes - add node status in mt8186-evb.dts - correct some dtbs_check warnings changes since v3: - remove serial, mmc and phy patch from series. (already merged) - remove mcusysoff node - move oscillator nodes at the head of dts - change name from usb-phy to t-phy changes since v2: - add soc {} in mt8186.dtsi changes since v1: - add dt-bindings: arm: Add compatible for MediaTek MT8186 Allen-KH Cheng (4): dt-bindings: timer: Add compatible for Mediatek MT8186 dt-bindings: arm: mediatek: Add mt8186 pericfg compatible dt-bindings: arm: Add compatible for MediaTek MT8186 arm64: dts: Add MediaTek SoC MT8186 dts and evaluation board and Makefile .../devicetree/bindings/arm/mediatek.yaml | 4 + .../arm/mediatek/mediatek,pericfg.yaml | 1 + .../bindings/timer/mediatek,mtk-timer.txt | 1 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8186-evb.dts | 232 +++++ arch/arm64/boot/dts/mediatek/mt8186.dtsi | 975 ++++++++++++++++++ 6 files changed, 1214 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8186-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8186.dtsi -- 2.18.0