From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>
Cc: <pbonzini@redhat.com>, <mlevitsk@redhat.com>, <seanjc@google.com>,
<joro@8bytes.org>, <jon.grimm@amd.com>, <wei.huang2@amd.com>,
<terry.bowman@amd.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH v4 04/15] KVM: SVM: Update max number of vCPUs supported for x2AVIC mode
Date: Sat, 7 May 2022 21:39:19 -0500 [thread overview]
Message-ID: <20220508023930.12881-5-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <20220508023930.12881-1-suravee.suthikulpanit@amd.com>
xAVIC and x2AVIC modes can support diffferent number of vcpus.
Update existing logics to support each mode accordingly.
Also, modify the maximum physical APIC ID for AVIC to 255 to reflect
the actual value supported by the architecture.
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
arch/x86/include/asm/svm.h | 12 +++++++++---
arch/x86/kvm/svm/avic.c | 8 +++++---
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index 2c2a104b777e..4c26b0d47d76 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -258,10 +258,16 @@ enum avic_ipi_failure_cause {
/*
- * 0xff is broadcast, so the max index allowed for physical APIC ID
- * table is 0xfe. APIC IDs above 0xff are reserved.
+ * For AVIC, the max index allowed for physical APIC ID
+ * table is 0xff (255).
*/
-#define AVIC_MAX_PHYSICAL_ID_COUNT 0xff
+#define AVIC_MAX_PHYSICAL_ID 0XFEULL
+
+/*
+ * For x2AVIC, the max index allowed for physical APIC ID
+ * table is 0x1ff (511).
+ */
+#define X2AVIC_MAX_PHYSICAL_ID 0x1FFUL
#define AVIC_HPA_MASK ~((0xFFFULL << 52) | 0xFFF)
#define VMCB_AVIC_APIC_BAR_MASK 0xFFFFFFFFFF000ULL
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index 95006bbdf970..29665b3e4e4e 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -185,7 +185,7 @@ void avic_init_vmcb(struct vcpu_svm *svm, struct vmcb *vmcb)
vmcb->control.avic_backing_page = bpa & AVIC_HPA_MASK;
vmcb->control.avic_logical_id = lpa & AVIC_HPA_MASK;
vmcb->control.avic_physical_id = ppa & AVIC_HPA_MASK;
- vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID_COUNT;
+ vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID;
vmcb->control.avic_vapic_bar = APIC_DEFAULT_PHYS_BASE & VMCB_AVIC_APIC_BAR_MASK;
if (kvm_apicv_activated(svm->vcpu.kvm))
@@ -200,7 +200,8 @@ static u64 *avic_get_physical_id_entry(struct kvm_vcpu *vcpu,
u64 *avic_physical_id_table;
struct kvm_svm *kvm_svm = to_kvm_svm(vcpu->kvm);
- if (index >= AVIC_MAX_PHYSICAL_ID_COUNT)
+ if ((avic_mode == AVIC_MODE_X1 && index > AVIC_MAX_PHYSICAL_ID) ||
+ (avic_mode == AVIC_MODE_X2 && index > X2AVIC_MAX_PHYSICAL_ID))
return NULL;
avic_physical_id_table = page_address(kvm_svm->avic_physical_id_table_page);
@@ -247,7 +248,8 @@ static int avic_init_backing_page(struct kvm_vcpu *vcpu)
int id = vcpu->vcpu_id;
struct vcpu_svm *svm = to_svm(vcpu);
- if (id >= AVIC_MAX_PHYSICAL_ID_COUNT)
+ if ((avic_mode == AVIC_MODE_X1 && id > AVIC_MAX_PHYSICAL_ID) ||
+ (avic_mode == AVIC_MODE_X2 && id > X2AVIC_MAX_PHYSICAL_ID))
return -EINVAL;
if (!vcpu->arch.apic->regs)
--
2.25.1
next prev parent reply other threads:[~2022-05-08 2:40 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-08 2:39 [PATCH v4 00/15] Introducing AMD x2AVIC and hybrid-AVIC modes Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 01/15] x86/cpufeatures: Introduce x2AVIC CPUID bit Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 02/15] KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to [GET/SET]_XAPIC_DEST_FIELD Suravee Suthikulpanit
2022-05-09 14:27 ` Gupta, Pankaj
2022-05-08 2:39 ` [PATCH v4 03/15] KVM: SVM: Detect X2APIC virtualization (x2AVIC) support Suravee Suthikulpanit
2022-05-09 10:15 ` Maxim Levitsky
2022-05-08 2:39 ` Suravee Suthikulpanit [this message]
2022-05-09 13:35 ` [PATCH v4 04/15] KVM: SVM: Update max number of vCPUs supported for x2AVIC mode Gupta, Pankaj
2022-05-08 2:39 ` [PATCH v4 05/15] KVM: SVM: Update avic_kick_target_vcpus to support 32-bit APIC ID Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 06/15] KVM: SVM: Do not support updating APIC ID when in x2APIC mode Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 07/15] KVM: SVM: Adding support for configuring x2APIC MSRs interception Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 08/15] KVM: x86: Deactivate APICv on vCPU with APIC disabled Suravee Suthikulpanit
2022-05-09 10:18 ` Maxim Levitsky
2022-05-09 10:30 ` Maxim Levitsky
2022-05-09 10:19 ` Maxim Levitsky
2022-05-08 2:39 ` [PATCH v4 09/15] KVM: SVM: Refresh AVIC configuration when changing APIC mode Suravee Suthikulpanit
2022-05-09 10:22 ` Maxim Levitsky
2022-05-08 2:39 ` [PATCH v4 10/15] KVM: SVM: Introduce helper functions to (de)activate AVIC and x2AVIC Suravee Suthikulpanit
2022-05-09 13:42 ` Maxim Levitsky
2022-05-11 15:37 ` Suravee Suthikulpanit
2022-05-11 16:26 ` Maxim Levitsky
2022-05-08 2:39 ` [PATCH v4 11/15] KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu Suravee Suthikulpanit
2022-05-09 13:40 ` Gupta, Pankaj
2022-05-08 2:39 ` [PATCH v4 12/15] KVM: SVM: Introduce hybrid-AVIC mode Suravee Suthikulpanit
2022-05-09 11:23 ` Suthikulpanit, Suravee
2022-05-08 2:39 ` [PATCH v4 13/15] KVM: x86: Warning APICv inconsistency only when vcpu APIC mode is valid Suravee Suthikulpanit
2022-05-09 13:38 ` Gupta, Pankaj
2022-05-08 2:39 ` [PATCH v4 14/15] KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible Suravee Suthikulpanit
2022-05-08 2:39 ` [PATCH v4 15/15] KVM: SVM: Add AVIC doorbell tracepoint Suravee Suthikulpanit
2022-05-09 10:28 ` [PATCH v4 00/15] Introducing AMD x2AVIC and hybrid-AVIC modes Maxim Levitsky
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