[cxl:preview 40/67] drivers/cxl/core/pci.c:137:14: error: call to undeclared function 'readq'; ISO C99 and later do not support implicit function declarations

[kernel test robot <lkp@intel.com>]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git preview
head:   9c642abd8b31d895f34186bd72b7360083b58492
commit: e7ed4a0688738b1f47a6b500444942d4dfa1035d [40/67] cxl/pci: Move cxl_await_media_ready() to the core
config: i386-randconfig-c001-20220509 (https://download.01.org/0day-ci/archive/20220512/202205121731.lbcgjrP6-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 18dd123c56754edf62c7042dcf23185c3727610f)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git/commit/?id=e7ed4a0688738b1f47a6b500444942d4dfa1035d
        git remote add cxl https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git
        git fetch --no-tags cxl preview
        git checkout e7ed4a0688738b1f47a6b500444942d4dfa1035d
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/cxl/core/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/cxl/core/pci.c:137:14: error: call to undeclared function 'readq'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
           md_status = readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET);
                       ^
   1 error generated.


vim +/readq +137 drivers/cxl/core/pci.c

   103	
   104	/*
   105	 * Wait up to @media_ready_timeout for the device to report memory
   106	 * active.
   107	 */
   108	int cxl_await_media_ready(struct cxl_dev_state *cxlds)
   109	{
   110		struct pci_dev *pdev = to_pci_dev(cxlds->dev);
   111		int d = cxlds->cxl_dvsec;
   112		bool active = false;
   113		u64 md_status;
   114		int rc, i;
   115	
   116		for (i = media_ready_timeout; i; i--) {
   117			u32 temp;
   118	
   119			rc = pci_read_config_dword(
   120				pdev, d + CXL_DVSEC_RANGE_SIZE_LOW(0), &temp);
   121			if (rc)
   122				return rc;
   123	
   124			active = FIELD_GET(CXL_DVSEC_MEM_ACTIVE, temp);
   125			if (active)
   126				break;
   127			msleep(1000);
   128		}
   129	
   130		if (!active) {
   131			dev_err(&pdev->dev,
   132				"timeout awaiting memory active after %d seconds\n",
   133				media_ready_timeout);
   134			return -ETIMEDOUT;
   135		}
   136	
 > 137		md_status = readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET);

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