From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8615C433F5 for ; Thu, 19 May 2022 07:12:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234624AbiESHM3 (ORCPT ); Thu, 19 May 2022 03:12:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45692 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234513AbiESHMP (ORCPT ); Thu, 19 May 2022 03:12:15 -0400 Received: from verein.lst.de (verein.lst.de [213.95.11.211]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89A7B5640D for ; Thu, 19 May 2022 00:11:50 -0700 (PDT) Received: by verein.lst.de (Postfix, from userid 2407) id C07A368AFE; Thu, 19 May 2022 09:11:46 +0200 (CEST) Date: Thu, 19 May 2022 09:11:46 +0200 From: Christoph Hellwig To: Robin Murphy Cc: joro@8bytes.org, will@kernel.org, iommu@lists.linux-foundation.org, john.garry@huawei.com, hch@lst.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] iommu/dma: Add config for PCI SAC address trick Message-ID: <20220519071146.GB22301@lst.de> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.17 (2007-11-01) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 18, 2022 at 06:36:59PM +0100, Robin Murphy wrote: > +config IOMMU_DMA_PCI_SAC_OPT > + bool "Enable 64-bit legacy PCI optimisation by default" > + depends on IOMMU_DMA > + default X86 > + help > + Enable by default an IOMMU optimisation for 64-bit legacy PCI devices, > + wherein the DMA API layer will always first try to allocate a 32-bit > + DMA address suitable for a single address cycle, before falling back > + to allocating from the full usable address range. If your system has > + 64-bit legacy PCI devices in 32-bit slots where using dual address > + cycles reduces DMA throughput significantly, this optimisation may be > + beneficial to overall performance. The config option name sounds odd. Yes, maybe for actual 64-bit PCI this actualy is an optimization. But I'd think of it more as a workaround. and I'd probably word it as such. I also would not not default to true for x86, just allow for that. There is nothing fundamental about x86 wanting that, just that people use more crap drivers on x86. An the fact that AMD SEV sets the high bit for encrypted memory has been weeding out at least some of them. > +bool iommu_dma_forcedac __read_mostly = !IS_ENABLED(CONFIG_IOMMU_DMA_PCI_SAC_OPT); Overly long line here.