From: Alexandre Bailon <abailon@baylibre.com>
To: rafael@kernel.org, rui.zhang@intel.com,
daniel.lezcano@linaro.org, amitk@kernel.org
Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
khilman@baylibre.com, mka@chromium.org, robh+dt@kernel.org,
krzk+dt@kernel.org, matthias.bgg@gmail.com,
p.zabel@pengutronix.de, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, james.lo@mediatek.com,
fan.chen@mediatek.com, louis.yu@mediatek.com,
rex-bc.chen@mediatek.com,
Tinghan Shen <tinghan.shen@mediatek.com>,
Ben Tseng <ben.tseng@mediatek.com>,
Alexandre Bailon <abailon@baylibre.com>
Subject: [PATCH v7 6/6] arm64: dts: mt8195: Add thermal zone
Date: Tue, 24 May 2022 17:25:53 +0200 [thread overview]
Message-ID: <20220524152552.246193-7-abailon@baylibre.com> (raw)
In-Reply-To: <20220524152552.246193-1-abailon@baylibre.com>
From: Tinghan Shen <tinghan.shen@mediatek.com>
This adds the thermal zone for the mt8195.
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Signed-off-by: Ben Tseng <ben.tseng@mediatek.com>
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 104 +++++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 51443e83d906..8421cf35ae03 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/pinctrl/mt8195-pinfunc.h>
#include <dt-bindings/power/mt8195-power.h>
+#include <dt-bindings/reset/mt8195-resets.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@@ -812,6 +813,21 @@ spi0: spi@1100a000 {
status = "disabled";
};
+ lvts: lvts@1100b000 {
+ compatible = "mediatek,mt8195-lvts";
+ #thermal-sensor-cells = <1>;
+ reg = <0 0x1100b000 0 0x1000>,
+ <0 0x11278000 0 0x1000>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
+ resets = <&infracfg_ao MT8195_INFRA_RST0_THERM_CTRL_SWRST>,
+ <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
+
+ nvmem-cells = <&lvts_e_data1 &lvts_e_data2>;
+ nvmem-cell-names = "e_data1","e_data2";
+ };
+
spi1: spi@11010000 {
compatible = "mediatek,mt8195-spi",
"mediatek,mt6765-spi";
@@ -1616,4 +1632,92 @@ vencsys_core1: clock-controller@1b000000 {
#clock-cells = <1>;
};
};
+
+ thermal_zones: thermal-zones {
+ cpu-big1-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 0>;
+ };
+ cpu-big2-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 1>;
+ };
+ cpu-big3-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 2>;
+ };
+ cpu-big4-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 3>;
+ };
+ cpu-little1-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 4>;
+ };
+ cpu-little2-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 5>;
+ };
+ cpu-little3-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 6>;
+ };
+ cpu-little4-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 7>;
+ };
+ vpu1-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 8>;
+ };
+ vpu2-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 9>;
+ };
+ gpu1-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 10>;
+ };
+ gpu2-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 11>;
+ };
+ vdec-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 12>;
+ };
+ img-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 13>;
+ };
+ infra-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 14>;
+ };
+ cam1-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 15>;
+ };
+ cam2-thermal {
+ polling-delay = <0>; /* milliseconds */
+ polling-delay-passive = <0>; /* milliseconds */
+ thermal-sensors = <&lvts 16>;
+ };
+ };
};
--
2.35.1
prev parent reply other threads:[~2022-05-24 15:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-24 15:25 [PATCH v7 0/6] Add LVTS architecture thermal Alexandre Bailon
2022-05-24 15:25 ` [PATCH v7 1/6] thermal: mediatek: Relocate driver to mediatek folder Alexandre Bailon
2022-05-26 12:58 ` AngeloGioacchino Del Regno
2022-05-24 15:25 ` [PATCH v7 2/6] dt-bindings: thermal: Add binding document for LVTS thermal controllers Alexandre Bailon
2022-05-25 12:44 ` Rob Herring
2022-05-26 2:05 ` Rob Herring
2022-05-26 12:58 ` AngeloGioacchino Del Regno
2022-05-24 15:25 ` [PATCH v7 3/6] thermal: mediatek: Add LVTS drivers for SoC theraml zones Alexandre Bailon
2022-05-26 14:41 ` AngeloGioacchino Del Regno
2022-05-24 15:25 ` [PATCH v7 4/6] thermal: mediatek: Add thermal zone settings for mt8195 Alexandre Bailon
2022-05-24 15:25 ` [PATCH v7 5/6] arm64: dts: mt8195: Add efuse node to mt8195 Alexandre Bailon
2022-05-26 14:42 ` AngeloGioacchino Del Regno
2022-05-24 15:25 ` Alexandre Bailon [this message]
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