Re: [PATCH 2/2] backlight: rt4831: Add the property parsing for ocp level selection

[Daniel Thompson <daniel.thompson@linaro.org>]

On Thu, May 26, 2022 at 11:16:35AM +0800, cy_huang wrote:
> From: ChiYuan Huang <cy_huang@richtek.com>
> 
> Add the property parsing for ocp level selection.

Isn't this just restating the Subject: line?

It would be better to provide information useful to the reviewer here.
Something like:

"Currently this driver simply inherits whatever over-current protection
level is programmed into the hardware when it is handed over. Typically
this will be the reset value, <whatever>A, although the bootloader could
have established a different value.

Allow the correct OCP value to be provided by the DT."

BTW please don't uncritically copy the above into the patch header. It is
just made something up as an example and I did no fact checking...


> 
> Reported-by: Lucas Tsai <lucas_tsai@richtek.com>
> Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
> ---
>  drivers/video/backlight/rt4831-backlight.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/video/backlight/rt4831-backlight.c b/drivers/video/backlight/rt4831-backlight.c
> index 42155c7..c81f7d9 100644
> --- a/drivers/video/backlight/rt4831-backlight.c
> +++ b/drivers/video/backlight/rt4831-backlight.c
> @@ -12,6 +12,7 @@
>  #define RT4831_REG_BLCFG	0x02
>  #define RT4831_REG_BLDIML	0x04
>  #define RT4831_REG_ENABLE	0x08
> +#define RT4831_REG_BLOPT2	0x11
>  
>  #define RT4831_BLMAX_BRIGHTNESS	2048
>  
> @@ -23,6 +24,8 @@
>  #define RT4831_BLDIML_MASK	GENMASK(2, 0)
>  #define RT4831_BLDIMH_MASK	GENMASK(10, 3)
>  #define RT4831_BLDIMH_SHIFT	3
> +#define RT4831_BLOCP_MASK	GENMASK(1, 0)
> +#define RT4831_BLOCP_SHIFT	0
>  
>  struct rt4831_priv {
>  	struct device *dev;
> @@ -120,6 +123,16 @@ static int rt4831_parse_backlight_properties(struct rt4831_priv *priv,
>  	if (ret)
>  		return ret;
>  
> +	ret = device_property_read_u8(dev, "richtek,bled-ocp-sel", &propval);
> +	if (ret)
> +		propval = RT4831_BLOCPLVL_1P2A;

Is 1.2A the reset value for the register?

Additionally, it looks like adding a hard-coded default would cause
problems for existing platforms where the bootloader doesn't use
richtek,bled-ocp-sel and pre-configures a different value itself.

Would it be safer (in terms of working nicely with older bootloaders)
to only write to the RT4831_BLOCP_MASK if the new property is set?


Daniel.



> +
> +	propval = min_t(u8, propval, RT4831_BLOCPLVL_1P8A);
> +	ret = regmap_update_bits(priv->regmap, RT4831_REG_BLOPT2, RT4831_BLOCP_MASK,
> +				 propval << RT4831_BLOCP_SHIFT);
> +	if (ret)
> +		return ret;
> +
>  	ret = device_property_read_u8(dev, "richtek,channel-use", &propval);
>  	if (ret) {
>  		dev_err(dev, "richtek,channel-use DT property missing\n");
> -- 
> 2.7.4
>