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From: wen.ping.teh@intel.com
To: robin.murphy@arm.com
Cc: catalin.marinas@arm.com, devicetree@vger.kernel.org,
	dinguyen@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	wen.ping.teh@intel.com, will@kernel.org
Subject: Re: [PATCH] arm64: dts: Add support for Stratix 10 Software Virtual Platform
Date: Thu,  2 Jun 2022 22:38:16 +0800	[thread overview]
Message-ID: <20220602143816.3432427-1-wen.ping.teh@intel.com> (raw)
In-Reply-To: <7439ce39-a2c2-7310-27d3-08ba2ed75ac9@arm.com>

From: wen.ping.teh@intel.com

Hello Robin,

>> +/ {
>> +	model = "SOCFPGA Stratix 10 SWVP";
>> +	compatible = "arm,foundation-aarch64", "arm,vexpress";
>
>This is definitely not compatible with any Arm Versatile Express 
>platform. It doesn't even have RAM in the same place, for starters.

Will change to the correct platform i.e. "altr,socfpga-stratix10"

>> +		l2-cache@fffff000 {
>> +			compatible = "arm,pl310-cache";
>
>Yikes, I hope not!
>
>I didn't think AArch64 even allows outer caches that don't honour CPU 
>cache maintenance by VA? Either way I can't imagine we'd ever accept 
>PL310 support in mainline, so even if your model does actually have this 
>for some inexplicable reason, I don't think there's any point exposing 
>it in the DT.

Will remove outer cache.
All fixes have been done in v2 patch.
https://lore.kernel.org/linux-arm-kernel/20220602141151.3431212-1-wen.ping.teh@intel.com/T/#u

Thanks,
Wen Ping

  reply	other threads:[~2022-06-02 14:39 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-24 10:29 wen.ping.teh
2022-05-24 11:04 ` Krzysztof Kozlowski
2022-06-02  3:46   ` wen.ping.teh
2022-06-02  9:51     ` Krzysztof Kozlowski
2022-05-24 11:23 ` Robin Murphy
2022-06-02 14:38   ` wen.ping.teh [this message]
2022-05-24 13:53 ` Dinh Nguyen

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