From: Xu Yilun <yilun.xu@intel.com>
To: Ivan Bornyakov <i.bornyakov@metrotek.ru>
Cc: mdf@kernel.org, hao.wu@intel.com, trix@redhat.com,
Conor.Dooley@microchip.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, linux-fpga@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
system@metrotek.ru
Subject: Re: [PATCH v16 0/3] Microchip Polarfire FPGA manager
Date: Wed, 8 Jun 2022 17:24:46 +0800 [thread overview]
Message-ID: <20220608092446.GD481269@yilunxu-OptiPlex-7050> (raw)
In-Reply-To: <20220607111030.3003-1-i.bornyakov@metrotek.ru>
On Tue, Jun 07, 2022 at 02:10:27PM +0300, Ivan Bornyakov wrote:
> Add support to the FPGA manager for programming Microchip Polarfire
> FPGAs over slave SPI interface with .dat formatted bitsream image.
Sorry, I forgot that the doc, fpga-mgr.rst, should be updated for new
introduced stuff. Could you help do it?
Thanks,
Yilun
>
> Changelog:
> v1 -> v2: fix printk formating
> v2 -> v3:
> * replace "microsemi" with "microchip"
> * replace prefix "microsemi_fpga_" with "mpf_"
> * more sensible .compatible and .name strings
> * remove unused defines STATUS_SPI_VIOLATION and STATUS_SPI_ERROR
> v3 -> v4: fix unused variable warning
> Put 'mpf_of_ids' definition under conditional compilation, so it
> would not hang unused if CONFIG_OF is not enabled.
> v4 -> v5:
> * prefix defines with MPF_
> * mdelay() -> usleep_range()
> * formatting fixes
> * add DT bindings doc
> * rework fpga_manager_ops.write() to fpga_manager_ops.write_sg()
> We can't parse image header in write_init() because image header
> size is not known beforehand. Thus parsing need to be done in
> fpga_manager_ops.write() callback, but fpga_manager_ops.write()
> also need to be reenterable. On the other hand,
> fpga_manager_ops.write_sg() is called once. Thus, rework usage of
> write() callback to write_sg().
> v5 -> v6: fix patch applying
> I forgot to clean up unrelated local changes which lead to error on
> patch 0001-fpga-microchip-spi-add-Microchip-MPF-FPGA-manager.patch
> applying on vanilla kernel.
> v6 -> v7: fix binding doc to pass dt_binding_check
> v7 -> v8: another fix for dt_binding_check warning
> v8 -> v9:
> * add another patch to support bitstream offset in FPGA image buffer
> * rework fpga_manager_ops.write_sg() back to fpga_manager_ops.write()
> * move image header parsing from write() to write_init()
> v9 -> v10:
> * add parse_header() callback to fpga_manager_ops
> * adjust fpga_mgr_write_init[_buf|_sg]() for parse_header() usage
> * implement parse_header() in microchip-spi driver
> v10 -> v11: include missing unaligned.h to microchip-spi
> fix error: implicit declaration of function 'get_unaligned_le[16|32]'
> v11 -> v12:
> * microchip-spi: double read hw status, ignore first read, because it
> can be unreliable.
> * microchip-spi: remove sleep between status readings in
> poll_status_not_busy() to save a few seconds. Status is polled on
> every 16 byte writes - that is quite often, therefore
> usleep_range() accumulate to a considerable number of seconds.
> v12 -> v13:
> * fpga-mgr: separate fpga_mgr_parse_header_buf() from
> fpga_mgr_write_init_buf()
> * fpga-mgr: introduce FPGA_MGR_STATE_PARSE_HEADER and
> FPGA_MGR_STATE_PARSE_HEADER_ERR fpga_mgr_states
> * fpga-mgr: rename fpga_mgr_write_init_sg() to fpga_mgr_prepare_sg()
> and rework with respect to a new fpga_mgr_parse_header_buf()
> * fpga-mgr: rework write accounting in fpga_mgr_buf_load_sg() for
> better clarity
> * microchip-spi: rename MPF_STATUS_POLL_TIMEOUT to
> MPF_STATUS_POLL_RETRIES
> * microchip-spi: add comment about status reading quirk to
> mpf_read_status()
> * microchip-spi: rename poll_status_not_busy() to mpf_poll_status()
> and add comment.
> * microchip-spi: make if statement in mpf_poll_status() easier to
> read.
> v13 -> v14:
> * fpga-mgr: improvements from Xu Yilun in
> - fpga_mgr_parse_header_buf()
> - fpga_mgr_write_init_buf()
> - fpga_mgr_prepare_sg()
> - fpga_mgr_buf_load_sg()
> * fpga-mgr: add check for -EAGAIN from fpga_mgr_parse_header_buf()
> when called from fpga_mgr_buf_load_mapped()
> * microchip-spi: remove excessive cs_change from second spi_transfer
> in mpf_read_status()
> * microchip-spi: change type of components_size_start,
> bitstream_start, i from size_t to u32 in mpf_ops_parse_header()
> v14 -> v15: eliminate memcpy() in mpf_ops_write()
> Eliminate excessive memcpy() in mpf_ops_write() by using
> spi_sync_transfer() instead of spi_write().
> v15 -> v16:
> * microchip-spi: change back components_size_start and
> bitstream_start variables types to size_t, i - to u16 in
> mpf_ops_parse_header()
> * fpga-mgr: rename fpga_parse_header_buf() to
> fpga_parse_header_mapped(). It serves only mapped FPGA image now,
> adjust it accordingly.
> * fpga-mgr: separate fpga_mgr_parse_header_sg_first() and
> fpga_mgr_parse_header_sg() from fpga_mgr_prepare_sg()
>
> Ivan Bornyakov (3):
> fpga: fpga-mgr: support bitstream offset in image buffer
> fpga: microchip-spi: add Microchip MPF FPGA manager
> dt-bindings: fpga: add binding doc for microchip-spi fpga mgr
>
> .../fpga/microchip,mpf-spi-fpga-mgr.yaml | 44 ++
> drivers/fpga/Kconfig | 9 +
> drivers/fpga/Makefile | 1 +
> drivers/fpga/fpga-mgr.c | 236 +++++++++--
> drivers/fpga/microchip-spi.c | 393 ++++++++++++++++++
> include/linux/fpga/fpga-mgr.h | 17 +-
> 6 files changed, 671 insertions(+), 29 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
> create mode 100644 drivers/fpga/microchip-spi.c
>
> --
> 2.35.1
>
prev parent reply other threads:[~2022-06-08 10:00 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-07 11:10 Ivan Bornyakov
2022-06-07 11:10 ` [PATCH v16 1/3] fpga: fpga-mgr: support bitstream offset in image buffer Ivan Bornyakov
2022-06-08 9:18 ` Xu Yilun
2022-06-07 11:10 ` [PATCH v16 2/3] fpga: microchip-spi: add Microchip MPF FPGA manager Ivan Bornyakov
2022-06-08 9:20 ` Xu Yilun
2022-06-08 9:30 ` Conor.Dooley
2022-06-08 9:41 ` Xu Yilun
2022-06-08 10:01 ` Conor.Dooley
2022-06-08 10:35 ` Xu Yilun
2022-06-07 11:10 ` [PATCH v16 3/3] dt-bindings: fpga: add binding doc for microchip-spi fpga mgr Ivan Bornyakov
2022-06-08 9:21 ` Xu Yilun
2022-06-08 9:38 ` Conor.Dooley
2022-06-08 9:24 ` Xu Yilun [this message]
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