From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: linux-renesas-soc@vger.kernel.org
Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH] clk: renesas: r8a779f0: Add HSCIF0+1 clocks
Date: Mon, 13 Jun 2022 15:09:49 +0200 [thread overview]
Message-ID: <20220613130949.10001-1-wsa+renesas@sang-engineering.com> (raw)
Those have been successfully tested. HSCIF2+3 still need verification.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
drivers/clk/renesas/r8a779f0-cpg-mssr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
index 0aec5e8ffd96..a7c16e72515f 100644
--- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
@@ -118,6 +118,8 @@ static const struct cpg_core_clk r8a779f0_core_clks[] __initconst = {
};
static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = {
+ DEF_MOD("hscif0", 514, R8A779F0_CLK_S0D3),
+ DEF_MOD("hscif1", 515, R8A779F0_CLK_S0D3),
DEF_MOD("i2c0", 518, R8A779F0_CLK_S0D6_PER),
DEF_MOD("i2c1", 519, R8A779F0_CLK_S0D6_PER),
DEF_MOD("i2c2", 520, R8A779F0_CLK_S0D6_PER),
--
2.35.1
next reply other threads:[~2022-06-13 15:37 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-13 13:09 Wolfram Sang [this message]
2022-06-13 20:04 ` Wolfram Sang
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