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Marcel Ziswiler , Francesco Dolcini , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz Message-ID: <20220621180749.GA22098@francesco-nb.int.toradex.com> References: <20220512104019.19725-1-andrejs.cainikovs@toradex.com> In-Reply-To: <20220512104019.19725-1-andrejs.cainikovs@toradex.com> X-ClientProxiedBy: ZR0P278CA0032.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:1c::19) To ZRAP278MB0495.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:2e::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3740713f-a95e-4b48-1c54-08da53b0f3e0 X-MS-TrafficTypeDiagnostic: ZRAP278MB0205:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0 X-Microsoft-Antispam-Message-Info: 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X-MS-Exchange-CrossTenant-AuthSource: ZRAP278MB0495.CHEP278.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jun 2022 18:07:49.8184 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: d9995866-0d9b-4251-8315-093f062abab4 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: lnf/Un7yW4XWWkAECswOgz0/alH3bhb0Tq5OnpS1MtWgqgix+NyGiHFY+BrPl8UcZFKHlBtQmeDaUYfP0zz+hQDVJcYgfStG6uI7qCcKUQ0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: ZRAP278MB0205 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CDE13A77 smtp.mailfrom=francesco.dolcini@toradex.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: toradex.com Content-Type: text/plain; charset=WINDOWS-1252 Content-Disposition: inline Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Shawn, just a ping on this. Francesco On Thu, May 12, 2022 at 12:40:19PM +0200, Andrejs Cainikovs wrote: > Update SPI CAN controller clock to match current hardware design. > > Signed-off-by: Andrejs Cainikovs > --- > arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi > index 0d84d29e70f1..d309bc0ab8f6 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi > @@ -32,10 +32,10 @@ backlight: backlight { > }; > > /* Fixed clock dedicated to SPI CAN controller */ > - clk20m: oscillator { > + clk40m: oscillator { > compatible = "fixed-clock"; > #clock-cells = <0>; > - clock-frequency = <20000000>; > + clock-frequency = <40000000>; > }; > > gpio-keys { > @@ -194,7 +194,7 @@ &ecspi3 { > > can1: can@0 { > compatible = "microchip,mcp251xfd"; > - clocks = <&clk20m>; > + clocks = <&clk40m>; > interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_can1_int>; > -- > 2.34.1 >