From: Mikko Perttunen <cyndis@kapsi.fi>
To: thierry.reding@gmail.com, jonathanh@nvidia.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
digetx@gmail.com
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
Mikko Perttunen <mperttunen@nvidia.com>
Subject: [PATCH v2 12/13] gpu: host1x: Use RESTART_W to skip timed out jobs on Tegra186+
Date: Wed, 22 Jun 2022 14:37:32 +0300 [thread overview]
Message-ID: <20220622113733.1710471-13-cyndis@kapsi.fi> (raw)
In-Reply-To: <20220622113733.1710471-1-cyndis@kapsi.fi>
From: Mikko Perttunen <mperttunen@nvidia.com>
When MLOCK enforcement is enabled, the 0-word write currently done
is rejected by the hardware outside of an MLOCK region. As such,
on these chips, which also have the newer, more convenient RESTART_W
opcode, use that instead to skip over the timed out job.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
drivers/gpu/host1x/cdma.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/host1x/cdma.c b/drivers/gpu/host1x/cdma.c
index 765e5aa64eb6..bb1f3c746be4 100644
--- a/drivers/gpu/host1x/cdma.c
+++ b/drivers/gpu/host1x/cdma.c
@@ -457,9 +457,24 @@ void host1x_cdma_update_sync_queue(struct host1x_cdma *cdma,
* to offset 0xbad. This does nothing but
* has a easily detected signature in debug
* traces.
+ *
+ * On systems with MLOCK enforcement enabled,
+ * the above 0 word writes would fall foul of
+ * the enforcement. As such, in the first slot
+ * put a RESTART_W opcode to the beginning
+ * of the next job. We don't use this for older
+ * chips since those only support the RESTART
+ * opcode with inconvenient alignment requirements.
*/
- mapped[2*slot+0] = 0x1bad0000;
- mapped[2*slot+1] = 0x1bad0000;
+ if (i == 0 && host1x->info->has_wide_gather) {
+ unsigned int next_job = (job->first_get/8 + job->num_slots)
+ % HOST1X_PUSHBUFFER_SLOTS;
+ mapped[2*slot+0] = (0xd << 28) | (next_job * 2);
+ mapped[2*slot+1] = 0x0;
+ } else {
+ mapped[2*slot+0] = 0x1bad0000;
+ mapped[2*slot+1] = 0x1bad0000;
+ }
}
job->cancelled = true;
--
2.36.1
next prev parent reply other threads:[~2022-06-22 11:37 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-22 11:37 [PATCH v2 00/13] Host1x support on Tegra234 Mikko Perttunen
2022-06-22 11:37 ` [PATCH v2 01/13] dt-bindings: Add bindings for Tegra234 Host1x and VIC Mikko Perttunen
2022-06-22 14:28 ` Krzysztof Kozlowski
2022-06-22 11:37 ` [PATCH v2 02/13] dt-bindings: Add headers for Host1x and VIC on Tegra234 Mikko Perttunen
2022-06-22 14:23 ` Krzysztof Kozlowski
2022-06-22 11:37 ` [PATCH v2 03/13] arm64: tegra: Add " Mikko Perttunen
2022-06-22 11:37 ` [PATCH v2 04/13] gpu: host1x: Deduplicate hardware headers Mikko Perttunen
2022-06-22 11:37 ` [PATCH v2 05/13] gpu: host1x: Simplify register mapping and add common aperture Mikko Perttunen
2022-06-22 11:37 ` [PATCH v2 06/13] gpu: host1x: Program virtualization tables Mikko Perttunen
2022-06-22 11:37 ` [PATCH v2 07/13] gpu: host1x: Allow reset to be missing Mikko Perttunen
2022-06-22 11:37 ` [PATCH v2 08/13] gpu: host1x: Program interrupt destinations on Tegra234 Mikko Perttunen
2022-06-22 11:37 ` [PATCH v2 09/13] gpu: host1x: Tegra234 device data and headers Mikko Perttunen
2022-06-22 11:37 ` [PATCH v2 10/13] gpu: host1x: Rewrite job opcode sequence Mikko Perttunen
2022-06-22 11:37 ` [PATCH v2 11/13] gpu: host1x: Add MLOCK release code on Tegra234 Mikko Perttunen
2022-06-22 11:37 ` Mikko Perttunen [this message]
2022-06-22 11:37 ` [PATCH v2 13/13] drm/tegra: vic: Add Tegra234 support Mikko Perttunen
2022-06-22 14:25 ` [PATCH v2 00/13] Host1x support on Tegra234 Krzysztof Kozlowski
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