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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: linux-serial@vger.kernel.org,
	"Greg KH" <gregkh@linuxfoundation.org>,
	"Jiri Slaby" <jirislaby@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 4/4] serial: 8250_dw: Rework ->serial_out() LCR write retry logic
Date: Tue, 28 Jun 2022 16:42:34 +0300	[thread overview]
Message-ID: <20220628134234.53771-5-ilpo.jarvinen@linux.intel.com> (raw)
In-Reply-To: <20220628134234.53771-1-ilpo.jarvinen@linux.intel.com>

Currently dw8250_verify_write() (was dw8250_check_lcr()) nullifies the
benefit from differentiated ->serial_out() by having big if tree to
select correct write type.

Rework the logic such that the LCR write can be retried within the
relevant ->serial_out() handler:
  1. Move retries counter on the caller level and pass as pointer to
     dw8250_verify_write()
  2. Make dw8250_verify_write() return bool
  3. Retry the write on caller level (if needed)

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 drivers/tty/serial/8250/8250_dw.c | 59 ++++++++++++++++++-------------
 1 file changed, 35 insertions(+), 24 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index fc367d44f86d..f6846363341b 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -92,41 +92,36 @@ static void dw8250_force_idle(struct uart_port *p)
  * UART_16550_COMPATIBLE=NO or version prior to introducing that option).
  * If BUSY is set while writing to LCR register, the write is ignored and
  * needs to be retries.
+ *
+ * Returns: false if the caller should retry the write.
  */
-static void dw8250_verify_write(struct uart_port *p, int offset, int value)
+static bool dw8250_verify_write(struct uart_port *p, int offset, int value,
+				    unsigned int *retries)
 {
-	void __iomem *reg_offset = p->membase + (offset << p->regshift);
 	struct dw8250_data *d = to_dw8250_data(p->private_data);
-	int tries = 1000;
+	unsigned int lcr;
 
 	if ((offset != UART_LCR) || !d->uart_16550_compatible)
-		return;
+		return true;
 
 	/* Make sure LCR write wasn't ignored */
-	while (tries--) {
-		unsigned int lcr = p->serial_in(p, offset);
+	lcr = p->serial_in(p, offset);
 
-		if ((value & ~UART_LCR_SPAR) == (lcr & ~UART_LCR_SPAR))
-			return;
+	if ((value & ~UART_LCR_SPAR) == (lcr & ~UART_LCR_SPAR))
+		return true;
 
-		dw8250_force_idle(p);
+	dw8250_force_idle(p);
 
-#ifdef CONFIG_64BIT
-		if (p->type == PORT_OCTEON)
-			__raw_writeq(value & 0xff, reg_offset);
-		else
-#endif
-		if (p->iotype == UPIO_MEM32)
-			writel(value, reg_offset);
-		else if (p->iotype == UPIO_MEM32BE)
-			iowrite32be(value, reg_offset);
-		else
-			writeb(value, reg_offset);
+	if (*retries) {
+		*retries -= 1;
+		return false;
 	}
+
 	/*
 	 * FIXME: this deadlocks if port->lock is already held
 	 * dev_err(p->dev, "Couldn't set LCR to %d\n", value);
 	 */
+	return true;
 }
 
 /* Returns once the transmitter is empty or we run out of retries */
@@ -155,9 +150,13 @@ static void dw8250_tx_wait_empty(struct uart_port *p)
 
 static void dw8250_serial_out(struct uart_port *p, int offset, int value)
 {
+	unsigned int retries = 1000;
+
+retry:
 	writeb(value, p->membase + (offset << p->regshift));
 
-	dw8250_verify_write(p, offset, value);
+	if (!dw8250_verify_write(p, offset, value, &retries))
+		goto retry;
 }
 
 static void dw8250_serial_out38x(struct uart_port *p, int offset, int value)
@@ -188,20 +187,29 @@ static unsigned int dw8250_serial_inq(struct uart_port *p, int offset)
 
 static void dw8250_serial_outq(struct uart_port *p, int offset, int value)
 {
+	unsigned int retries = 1000;
+
 	value &= 0xff;
+
+retry:
 	__raw_writeq(value, p->membase + (offset << p->regshift));
 	/* Read back to ensure register write ordering. */
 	__raw_readq(p->membase + (UART_LCR << p->regshift));
 
-	dw8250_verify_write(p, offset, value);
+	if (!dw8250_verify_write(p, offset, value, &retries))
+		goto retry;
 }
 #endif /* CONFIG_64BIT */
 
 static void dw8250_serial_out32(struct uart_port *p, int offset, int value)
 {
+	unsigned int retries = 1000;
+
+retry:
 	writel(value, p->membase + (offset << p->regshift));
 
-	dw8250_verify_write(p, offset, value);
+	if (!dw8250_verify_write(p, offset, value, &retries))
+		goto retry;
 }
 
 static unsigned int dw8250_serial_in32(struct uart_port *p, int offset)
@@ -213,10 +221,13 @@ static unsigned int dw8250_serial_in32(struct uart_port *p, int offset)
 
 static void dw8250_serial_out32be(struct uart_port *p, int offset, int value)
 {
+	unsigned int retries = 1000;
 
+retry:
 	iowrite32be(value, p->membase + (offset << p->regshift));
 
-	dw8250_verify_write(p, offset, value);
+	if (!dw8250_verify_write(p, offset, value, &retries))
+		goto retry;
 }
 
 static unsigned int dw8250_serial_in32be(struct uart_port *p, int offset)
-- 
2.30.2


  parent reply	other threads:[~2022-06-28 13:43 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-28 13:42 [PATCH 0/4] serial: 8250_dw: Rework ->serial_out() & LCR " Ilpo Järvinen
2022-06-28 13:42 ` [PATCH 1/4] serial: 8250_dw: Use dw8250_serial_out() in dw8250_serial_out38x() Ilpo Järvinen
2022-06-28 13:42 ` [PATCH 2/4] serial: 8250_dw: Rename offset to reg_offset Ilpo Järvinen
2022-06-28 21:25   ` Andy Shevchenko
2022-06-29  7:47     ` Ilpo Järvinen
2022-06-29  9:38       ` Andy Shevchenko
2022-06-28 13:42 ` [PATCH 3/4] serial: 8250_dw: Move 16550 compatible & LCR checks to dw8250_verify_write() Ilpo Järvinen
2022-06-28 20:06   ` Andy Shevchenko
2022-06-28 13:42 ` Ilpo Järvinen [this message]
2022-06-28 20:11   ` [PATCH 4/4] serial: 8250_dw: Rework ->serial_out() LCR write retry logic Andy Shevchenko
2022-06-29  8:47     ` Ilpo Järvinen
2022-06-29  9:33       ` Andy Shevchenko
2022-06-29  9:40         ` Ilpo Järvinen
2022-06-29  9:51           ` Andy Shevchenko

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