From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<matthias.bgg@gmail.com>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <bin.zhang@mediatek.com>,
<benliang.zhao@mediatek.com>,
<linux-mediatek@lists.infradead.org>,
Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Subject: [PATCH v2 1/2] arm64: dts: mt8173: Fix nor_flash node
Date: Thu, 30 Jun 2022 17:01:56 +0800 [thread overview]
Message-ID: <20220630090157.29486-2-xiangsheng.hou@mediatek.com> (raw)
In-Reply-To: <20220630090157.29486-1-xiangsheng.hou@mediatek.com>
Add axi clock since the driver change to DMA mode which need
to enable axi clock. And change spi clock to 26MHz as default.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 40d7b47fc52e..e603170100af 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -790,9 +790,12 @@ thermal: thermal@1100b000 {
nor_flash: spi@1100d000 {
compatible = "mediatek,mt8173-nor";
reg = <0 0x1100d000 0 0xe0>;
+ assigned-clocks = <&topckgen CLK_TOP_SPI_SEL>;
+ assigned-clock-parents = <&clk26m>;
clocks = <&pericfg CLK_PERI_SPI>,
- <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
- clock-names = "spi", "sf";
+ <&topckgen CLK_TOP_SPINFI_IFR_SEL>,
+ <&pericfg CLK_PERI_NFI>;
+ clock-names = "spi", "sf", "axi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
--
2.25.1
next prev parent reply other threads:[~2022-06-30 9:02 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-30 9:01 [PATCH v2 0/2] arm64: dts: mt8173: Fix nor flash node Xiangsheng Hou
2022-06-30 9:01 ` Xiangsheng Hou [this message]
2022-07-07 14:43 ` [PATCH v2 1/2] arm64: dts: mt8173: Fix nor_flash node Matthias Brugger
[not found] ` <e4a50d4e165887ac4741c0b8d68470dc2f060655.camel@mediatek.com>
2022-07-08 8:22 ` Matthias Brugger
2022-06-30 9:01 ` [PATCH v2 2/2] dt-bindings: mediatek: Add assigned clock property and axi clock in example Xiangsheng Hou
2022-06-30 18:41 ` Krzysztof Kozlowski
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