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From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	shawnguo@kernel.org, s.hauer@pengutronix.de,
	l.stach@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
	laurent.pinchart@ideasonboard.com, marex@denx.de,
	paul.elder@ideasonboard.com, aford173@gmail.com,
	Markus.Niebel@ew.tq-group.com, alexander.stein@ew.tq-group.com,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, aisheng.dong@nxp.com,
	Peng Fan <peng.fan@nxp.com>
Subject: [PATCH 4/6] soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl
Date: Tue, 12 Jul 2022 16:21:44 +0800	[thread overview]
Message-ID: <20220712082146.1192215-5-peng.fan@oss.nxp.com> (raw)
In-Reply-To: <20220712082146.1192215-1-peng.fan@oss.nxp.com>

From: Peng Fan <peng.fan@nxp.com>

i.MX8MP has a VPU blk ctrl module that could supply clk and reset to
VPU, so add support for it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/soc/imx/imx8m-blk-ctrl.c | 47 ++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c
index 9b0f81dc292b..d958d2f0cc73 100644
--- a/drivers/soc/imx/imx8m-blk-ctrl.c
+++ b/drivers/soc/imx/imx8m-blk-ctrl.c
@@ -484,6 +484,50 @@ static const struct imx8m_blk_ctrl_data imx8mm_vpu_blk_ctl_dev_data = {
 	.num_domains = ARRAY_SIZE(imx8mm_vpu_blk_ctl_domain_data),
 };
 
+#define IMX8MP_VPUBLK_G1	0
+#define IMX8MP_VPUBLK_G2	1
+#define IMX8MP_VPUBLK_VCE	2
+
+static const struct imx8m_blk_ctrl_domain_data imx8mp_vpu_blk_ctl_domain_data[] = {
+	[IMX8MP_VPUBLK_PD_G1] = {
+		.name = "vpublk-g1",
+		.clk_names = (const char *[]){ "g1", },
+		.num_clks = 1,
+		.gpc_name = "g1",
+		.rst_mask = BIT(1),
+		.clk_mask = BIT(1),
+		.path_names = (const char *[]){"g1"},
+		.num_paths = 1,
+	},
+	[IMX8MP_VPUBLK_PD_G2] = {
+		.name = "vpublk-g2",
+		.clk_names = (const char *[]){ "g2", },
+		.num_clks = 1,
+		.gpc_name = "g2",
+		.rst_mask = BIT(0),
+		.clk_mask = BIT(0),
+		.path_names = (const char *[]){"g2"},
+		.num_paths = 1,
+	},
+	[IMX8MP_VPUBLK_PD_H1] = {
+		.name = "vpublk-h1",
+		.clk_names = (const char *[]){ "h1", },
+		.num_clks = 1,
+		.gpc_name = "h1",
+		.rst_mask = BIT(2),
+		.clk_mask = BIT(2),
+		.path_names = (const char *[]){"h1"},
+		.num_paths = 1,
+	},
+};
+
+static const struct imx8m_blk_ctrl_data imx8mp_vpu_blk_ctl_dev_data = {
+	.max_reg = 0x18,
+	.power_notifier_fn = imx8mm_vpu_power_notifier,
+	.domains = imx8mp_vpu_blk_ctl_domain_data,
+	.num_domains = ARRAY_SIZE(imx8mp_vpu_blk_ctl_domain_data),
+};
+
 static int imx8mm_disp_power_notifier(struct notifier_block *nb,
 				      unsigned long action, void *data)
 {
@@ -827,6 +871,9 @@ static const struct of_device_id imx8m_blk_ctrl_of_match[] = {
 	}, {
 		.compatible = "fsl,imx8mq-vpu-blk-ctrl",
 		.data = &imx8mq_vpu_blk_ctl_dev_data
+	}, {
+		.compatible = "fsl,imx8mp-vpu-blk-ctrl",
+		.data = &imx8mp_vpu_blk_ctl_dev_data
 	}, {
 		/* Sentinel */
 	}
-- 
2.25.1


  parent reply	other threads:[~2022-07-12  8:20 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-12  8:21 [PATCH 0/6] imx: add i.MX8MP hdmi blk ctrl hdcp/hrv and vpu " Peng Fan (OSS)
2022-07-12  8:21 ` [PATCH 1/6] dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV Peng Fan (OSS)
2022-07-12  8:20   ` Krzysztof Kozlowski
2022-07-12  8:21 ` [PATCH 2/6] dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl Peng Fan (OSS)
2022-07-12  8:21   ` Krzysztof Kozlowski
2022-07-12 12:11   ` Adam Ford
2022-07-12 12:53     ` Peng Fan
2022-07-12  8:21 ` [PATCH 3/6] soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV Peng Fan (OSS)
2022-07-12  8:21 ` Peng Fan (OSS) [this message]
2022-07-12  8:21 ` [PATCH 5/6] arm64: dts: imx8mp: add vpu pgc nodes Peng Fan (OSS)
2022-07-12  8:21 ` [PATCH 6/6] arm64: dts: imx8mp: add VPU blk ctrl node Peng Fan (OSS)

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