From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E24CC43334 for ; Wed, 13 Jul 2022 05:30:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234294AbiGMFaP (ORCPT ); Wed, 13 Jul 2022 01:30:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234039AbiGMF3i (ORCPT ); Wed, 13 Jul 2022 01:29:38 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 52D7037F8F; Tue, 12 Jul 2022 22:29:29 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 7BEBBBCA; Wed, 13 Jul 2022 08:31:18 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 7BEBBBCA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1657690278; bh=242XWgd0beiIZrzRTnwpgzsZw6dSuiW41UyARfAwlLg=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=lFqAqLjk9SqMSPnmUaMrkXTXGWz0yBYj0mk0ua15M9VlMngbACzyGIgpxJeZE2Xdi 5ibwTUp1g4dViLIB6b+lckR0pRrgv9kvVo1trYpIRNGQoCns4eJE9e7Tyc8SKD+lo4 unKcH84aYdScNXhWgDUcj+/XNkqAkrEMO6cFbBWw= Received: from localhost (192.168.53.207) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 13 Jul 2022 08:29:22 +0300 From: Serge Semin To: Damien Le Moal , Hans de Goede , Jens Axboe , Hannes Reinecke , Rob Herring , Krzysztof Kozlowski CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , , , , Rob Herring Subject: [PATCH v5 03/23] dt-bindings: ata: ahci-platform: Clarify common AHCI props constraints Date: Wed, 13 Jul 2022 08:28:56 +0300 Message-ID: <20220713052917.27036-4-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220713052917.27036-1-Sergey.Semin@baikalelectronics.ru> References: <20220713052917.27036-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Indeed in accordance with what is implemented in the AHCI platform driver and the way the AHCI DT nodes are defined in the DT files we can add the next AHCI DT properties constraints: AHCI CSR ID is fixed to 'ahci', PHY name is fixed to 'sata-phy', AHCI controller can't have more than 32 ports by design, AHCI controller can have up to 32 IRQ lines. Signed-off-by: Serge Semin Reviewed-by: Hannes Reinecke Reviewed-by: Rob Herring --- Changelog v2: - This is a new patch created after rebasing v1 onto the 5.18-rc3 kernel. Changelog v4: - Fix spelling: 'imeplemtned' and 'paltform' in the patch log. (@Hannes) - Add the interrupts property constraints. (@Rob) - Add forgotten '---' patchlog-changelog separator. (@Sergei) --- .../devicetree/bindings/ata/ahci-common.yaml | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/ata/ahci-common.yaml b/Documentation/devicetree/bindings/ata/ahci-common.yaml index e89bda3b62cc..12a97b56226f 100644 --- a/Documentation/devicetree/bindings/ata/ahci-common.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-common.yaml @@ -31,12 +31,16 @@ properties: reg-names: description: CSR space IDs + contains: + const: ahci interrupts: description: Generic AHCI state change interrupt. Can be implemented either as a single line attached to the controller or as a set of the signals indicating the particular port events. + minItems: 1 + maxItems: 32 ahci-supply: description: Power regulator for AHCI controller @@ -52,14 +56,13 @@ properties: maxItems: 1 phy-names: - maxItems: 1 + const: sata-phy ports-implemented: $ref: '/schemas/types.yaml#/definitions/uint32' description: Mask that indicates which ports the HBA supports. Useful if PI is not programmed by the BIOS, which is true for some embedded SoC's. - maximum: 0x1f patternProperties: "^sata-port@[0-9a-f]+$": @@ -80,8 +83,12 @@ $defs: properties: reg: - description: AHCI SATA port identifier - maxItems: 1 + description: + AHCI SATA port identifier. By design AHCI controller can't have + more than 32 ports due to the CAP.NP fields and PI register size + constraints. + minimum: 0 + maximum: 31 phys: description: Individual AHCI SATA port PHY @@ -89,7 +96,7 @@ $defs: phy-names: description: AHCI SATA port PHY ID - maxItems: 1 + const: sata-phy target-supply: description: Power regulator for SATA port target device -- 2.35.1