From: kah.jing.lee@intel.com
To: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org, arnd@arndb.de
Cc: rafael.j.wysocki@intel.com, tien.sung.ang@intel.com,
dinh.nguyen@intel.com, Kah Jing Lee <kah.jing.lee@intel.com>,
Zhou Furong <furong.zhou@intel.com>,
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Subject: [PATCH v3 2/3] dt-bindings: misc: intel_sysid: Add the system id binding for Altera(Intel) FPGA platform
Date: Mon, 25 Jul 2022 11:56:52 +0800 [thread overview]
Message-ID: <20220725035650.648838-1-kah.jing.lee@intel.com> (raw)
In-Reply-To: <20220721123216.416696-1-kah.jing.lee@intel.com>
From: Kah Jing Lee <kah.jing.lee@intel.com>
This binding is created for Altera(Intel) FPGA platform System ID soft IP.
The Altera(Intel) Sysid component is generally part of an FPGA design.
The component can be hotplugged when the FPGA is reconfigured.
Based on an initial contribution from Ley Foon Tan at Altera
Signed-off-by: Kah Jing Lee <kah.jing.lee@intel.com>
Reviewed-by: Zhou Furong <furong.zhou@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
---
v2->v3:
- Updated maintainer
---
---
.../bindings/misc/intel,socfpga-sysid.yaml | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/intel,socfpga-sysid.yaml
diff --git a/Documentation/devicetree/bindings/misc/intel,socfpga-sysid.yaml b/Documentation/devicetree/bindings/misc/intel,socfpga-sysid.yaml
new file mode 100644
index 000000000000..7426cbe4462b
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/intel,socfpga-sysid.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022, Intel Corporation.
+# Copyright (C) 2013-2015, Altera Corporation.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/intel,socfpga-sysid.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera(Intel) Sysid IP core driver
+
+maintainers:
+ - Kah Jing Lee <kah.jing.lee@intel.com>
+
+description: |
+ The Altera(Intel) Sysid component is generally part of an FPGA design. The
+ component can be hotplugged when the FPGA is reconfigured. This patch
+ fixes the driver to support the component being hotplugged.
+
+properties:
+ compatible:
+ items:
+ - const: intel,socfpga-sysid-1.0
+
+ reg:
+ items:
+ - description: physical address and length of the registers which
+ contain revision and debug features
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ sysid_qsys: sysid@10000 {
+ compatible = "intel,socfpga-sysid-1.0";
+ reg = < 0x10000 0x00000008 >;
+ };
--
2.25.1
next prev parent reply other threads:[~2022-07-25 3:58 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-02 12:20 [PATCH 0/2] New driver for Intel(Altera) FPGA System ID softIP kah.jing.lee
2022-06-03 6:41 ` Greg KH
2022-06-03 7:35 ` kah.jing.lee
2022-07-21 12:30 ` [PATCH v2 0/3] " kah.jing.lee
2022-07-21 12:31 ` [PATCH v2 1/3] drivers: misc: intel_sysid: Add sysid from arch to drivers kah.jing.lee
2022-07-27 21:02 ` kernel test robot
2022-07-28 7:53 ` Greg KH
2022-07-28 15:37 ` Pierre-Louis Bossart
2022-07-28 15:59 ` Greg KH
2022-07-28 16:53 ` Pierre-Louis Bossart
2022-07-29 11:43 ` Greg KH
2022-07-29 11:56 ` Greg KH
2022-07-29 13:57 ` Greg KH
2022-07-28 7:57 ` Greg KH
2022-08-14 12:07 ` kernel test robot
2022-07-21 12:32 ` [PATCH v2 2/3] dt-bindings: misc: intel_sysid: Add the system id binding for Altera(Intel) FPGA platform kah.jing.lee
2022-07-21 19:16 ` Greg KH
2022-07-25 3:47 ` kah.jing.lee
2022-07-25 3:56 ` kah.jing.lee [this message]
2022-07-21 12:32 ` [PATCH v2 3/3] documentation: misc: intel_sysid: Add the system id sysfs documentation " kah.jing.lee
2022-07-21 19:16 ` Greg KH
2022-07-25 3:59 ` [PATCH v3 " kah.jing.lee
2022-07-28 7:51 ` Greg KH
2022-07-28 7:58 ` [PATCH v2 0/3] New driver for Intel(Altera) FPGA System ID softIP Greg KH
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220725035650.648838-1-kah.jing.lee@intel.com \
--to=kah.jing.lee@intel.com \
--cc=arnd@arndb.de \
--cc=dinh.nguyen@intel.com \
--cc=furong.zhou@intel.com \
--cc=gregkh@linuxfoundation.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pierre-louis.bossart@linux.intel.com \
--cc=rafael.j.wysocki@intel.com \
--cc=tien.sung.ang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®