From: Balsam CHIHI <bchihi@baylibre.com>
To: rafael@kernel.org, rui.zhang@intel.com,
daniel.lezcano@linaro.org, amitk@kernel.org
Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
khilman@baylibre.com, mka@chromium.org, robh+dt@kernel.org,
krzk+dt@kernel.org, matthias.bgg@gmail.com,
p.zabel@pengutronix.de, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, james.lo@mediatek.com,
fan.chen@mediatek.com, louis.yu@mediatek.com,
rex-bc.chen@mediatek.com, abailon@baylibre.com
Subject: [PATCH v8 2/6] dt-bindings: thermal: Add binding document for LVTS thermal controllers
Date: Tue, 26 Jul 2022 15:55:02 +0200 [thread overview]
Message-ID: <20220726135506.485108-3-bchihi@baylibre.com> (raw)
In-Reply-To: <20220726135506.485108-1-bchihi@baylibre.com>
This patch adds dt-binding documents for mt8192 and mt8195 thermal controllers.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
---
.../thermal/mediatek,mt8192-lvts.yaml | 73 ++++++++++++++++++
.../thermal/mediatek,mt8195-lvts.yaml | 75 +++++++++++++++++++
2 files changed, 148 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,mt8195-lvts.yaml
diff --git a/Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml b/Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml
new file mode 100644
index 000000000000..8c5a02eb97c5
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/mediatek,mt8192-lvts.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek SoC LVTS thermal controller
+
+maintainers:
+ - Yu-Chia Chang <ethan.chang@mediatek.com>
+ - Ben Tseng <ben.tseng@mediatek.com>
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8192-lvts-ap
+ - mediatek,mt8192-lvts-mcu
+
+ "#thermal-sensor-cells":
+ const: 1
+
+ reg:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ items:
+ - description: SW reset HW AP/MCU domain for clean temporary data when HW initialization and resume.
+
+ nvmem-cells:
+ items:
+ - description: LVTS calibration data for thermal sensors
+
+ nvmem-cell-names:
+ items:
+ - const: lvts_calib_data
+
+required:
+ - compatible
+ - '#thermal-sensor-cells'
+ - reg
+ - interrupts
+ - clocks
+ - resets
+ - nvmem-cells
+ - nvmem-cell-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/thermal/thermal.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/mt8192-clk.h>
+ #include <dt-bindings/reset/mt8192-resets.h>
+
+ lvtsmcu: thermal-sensor@11278000 {
+ compatible = "mediatek,mt8192-lvts-mcu";
+ #thermal-sensor-cells = <1>;
+ reg = <0 0x11278000 0 0x400>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg_ao CLK_INFRA_THERM>;
+ resets = <&infracfg_ao MT8192_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
+ nvmem-cells = <&lvts_efuse_data>;
+ nvmem-cell-names = "lvts_calib_data";
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/thermal/mediatek,mt8195-lvts.yaml b/Documentation/devicetree/bindings/thermal/mediatek,mt8195-lvts.yaml
new file mode 100644
index 000000000000..6b0b53a33272
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek,mt8195-lvts.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/mediatek,mt8195-lvts.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek SoC LVTS thermal controller
+
+maintainers:
+ - Yu-Chia Chang <ethan.chang@mediatek.com>
+ - Ben Tseng <ben.tseng@mediatek.com>
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8195-lvts-ap
+ - mediatek,mt8195-lvts-mcu
+
+ "#thermal-sensor-cells":
+ const: 1
+
+ reg:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ items:
+ - description: SW reset HW AP/MCU domain for clean temporary data when HW initialization and resume.
+
+ nvmem-cells:
+ items:
+ - description: LVTS calibration data 1 for thermal sensors
+ - description: LVTS calibration data 2 for thermal sensors
+
+ nvmem-cell-names:
+ items:
+ - const: lvts_calib_data1
+ - const: lvts_calib_data2
+
+required:
+ - compatible
+ - '#thermal-sensor-cells'
+ - reg
+ - interrupts
+ - clocks
+ - resets
+ - nvmem-cells
+ - nvmem-cell-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/thermal/thermal.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/mt8195-clk.h>
+ #include <dt-bindings/reset/mt8195-resets.h>
+
+ lvtsmcu: thermal-sensor@11278000 {
+ compatible = "mediatek,mt8195-lvts-mcu";
+ #thermal-sensor-cells = <1>;
+ reg = <0 0x11278000 0 0x400>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
+ resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
+ nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
+ nvmem-cell-names = "lvts_calib_data1", "lvts_calib_data2";
+ };
+
+...
--
2.34.1
next prev parent reply other threads:[~2022-07-26 13:55 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-26 13:55 [PATCH v8 0/6] Add LVTS architecture thermal Balsam CHIHI
2022-07-26 13:55 ` [PATCH v8 1/6] thermal: mediatek: Relocate driver to mediatek folder Balsam CHIHI
2022-07-27 8:17 ` AngeloGioacchino Del Regno
2022-07-27 8:24 ` AngeloGioacchino Del Regno
2022-07-27 9:03 ` Balsam CHIHI
2022-07-28 8:53 ` Daniel Lezcano
2022-07-29 15:19 ` Balsam CHIHI
2022-07-29 15:21 ` Balsam CHIHI
2022-07-29 15:35 ` Daniel Lezcano
2022-08-03 8:41 ` Balsam CHIHI
2022-08-03 10:51 ` Daniel Lezcano
2022-07-26 13:55 ` Balsam CHIHI [this message]
2022-07-26 20:09 ` [PATCH v8 2/6] dt-bindings: thermal: Add binding document for LVTS thermal controllers Rob Herring
2022-07-27 9:02 ` Balsam CHIHI
2022-07-29 15:15 ` Balsam CHIHI
2022-08-10 18:25 ` Rob Herring
2022-07-27 8:17 ` AngeloGioacchino Del Regno
2022-07-27 9:02 ` Balsam CHIHI
2022-07-26 13:55 ` [PATCH v8 3/6] thermal: mediatek: Add LVTS drivers for SoC theraml zones for mt8192 Balsam CHIHI
2022-07-27 9:23 ` AngeloGioacchino Del Regno
2022-07-29 15:38 ` Balsam CHIHI
2022-07-29 20:30 ` Nícolas F. R. A. Prado
2022-07-26 13:55 ` [PATCH v8 4/6] thermal: mediatek: Add thermal zone settings for mt8195 Balsam CHIHI
2022-07-26 13:55 ` [PATCH v8 5/6] arm64: dts: mt8195: Add efuse node to mt8195 Balsam CHIHI
2022-07-29 20:14 ` Nícolas F. R. A. Prado
2022-08-01 12:33 ` Balsam CHIHI
2022-08-01 13:57 ` Nícolas F. R. A. Prado
2022-07-26 13:55 ` [PATCH v8 6/6] arm64: dts: mt8195: Add thermal zone Balsam CHIHI
2022-07-29 20:22 ` Nícolas F. R. A. Prado
2022-07-29 20:33 ` [PATCH v8 0/6] Add LVTS architecture thermal Nícolas F. R. A. Prado
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